Cypress Semiconductor Rambus XDR CY24272 사양 시트 - 페이지 7

{카테고리_이름} Cypress Semiconductor Rambus XDR CY24272에 대한 사양 시트을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress Semiconductor Rambus XDR CY24272 13 페이지. Clock generator with zero sda hold time

Cypress Semiconductor Rambus XDR CY24272 사양 시트

DC Operating Conditions

Parameter
V
Supply Voltage for PLL
DDP
V
Supply Voltage for Core
DDC
V
Supply Voltage for Clock Buffers
DD
V
Input High Voltage, REFCLK/REFCLKB
IHCLK
V
Input Low Voltage, REFCLK/REFCLKB
ILCLK
[6]
V
Crossing Point Voltage, REFCLK/REFCLKB
IXCLK
ΔV
[6]
Difference in Crossing Point Voltage, REFCLK/REFCLKB
IXCLK
V
Input Signal High Voltage at ID0, ID1, EN, and /BYPASS
IH
V
Input Signal Low Voltage at ID0, ID1, EN, and /BYPASS
IL
V
Input Signal High Voltage at SCL and SDA
IH,SM
V
Input Signal Low Voltage at SCL and SDA
IL,SM
[8]
V
Input Threshold Voltage for single-ended REFCLK
TH
V
Input Signal High Voltage for single-ended REFCLK
IH,SE
V
Input Signal Low Voltage for single-ended REFCLK
IL,SE
T
Ambient Operating Temperature
A
Notes
and ΔV
6. Not 100% tested except V
IXCLK
7. This range of SCL and SDA input high voltage enables the CY24272 for use with 3.3V, 2.5V, or 1.8V SMBus voltages.
8. Single-ended operation guaranteed only when 0.8 < (V
Document Number: 001-42414 Rev. **
Description
[7]
. Parameters guaranteed by design and characterizations, not 100% tested in production.
IXCLK
– V
)/(V
– V
IH,SE
TH
TH
IL
Condition
2.5V ± 5%
2.5V ± 5%
2.5V ± 5%
,
) < 1.2.
SE
CY24272
Min
Max
Unit
2.375
2.625
V
2.375
2.625
V
2.375
2.625
V
0.6
0.95
V
–0.15
+0.15
V
200
550
mV
150
mV
1.4
2.625
V
–0.15
0.8
V
1.4
3.465
V
–0.15
0.8
V
0.35
0.5V
V
DD
V
+ 0.3
2.625
V
TH
–0.15
V
– 0.3
V
TH
0
70
°C
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