Cypress Semiconductor STK11C68-5 사양 시트 - 페이지 2
{카테고리_이름} Cypress Semiconductor STK11C68-5에 대한 사양 시트을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress Semiconductor STK11C68-5 16 페이지. 64 kbit (8k x 8) softstore nvsram
페이지 인쇄
Pinouts
Figure 1. Pin Diagram - 28-Pin DIP
Pin Definitions
Pin Name
Alt
I/O Type
A
–A
Input
0
12
DQ
-DQ
Input/Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation.
0
7
Input
WE
W
Input
CE
E
Input
OE
G
V
Ground
SS
V
Power Supply Power Supply Inputs to the Device.
CC
Document Number: 001-51001 Rev. *A
Address Inputs. Used to select one of the 8,192 bytes of the nvSRAM.
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O
pins is written to the specific address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the
chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during
read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
Ground for the Device. The device is connected to ground of the system.
STK11C68-5 (SMD5962-92324)
Figure 2. Pin Diagram - 28-Pin LLC
Description
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