Anly H5CLR-8 User Manual - Page 2

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A
: Signal ON delay 1
(Timer resets when power comes ON.)
SOURCE
Start signal
Gate
Reset
t
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON. *Note1
The control output is controlled using a sustained or
one-shot time period.
A-1
:
Signal ON delay 2
(Timer resets when power comes ON.)
SOURCE
Start signal
Gate
Reset
t
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON, and is reset
when the start signal goes OFF. *Note1
The control output is controlled using a sustained or one-
shot time period.
A-2
:
Power ON delay 1
(Timer resets when power comes ON.)
SOURCE
Start signal
Gate
Reset
t
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the reset input goes OFF.
The start signal disables the timing function (ie., same
function as the gate input).
The control output is controlled using a sustained or
one-shot time period.
A-3
:
Power ON delay 2
(Timer dose not reset when power comes ON.)
SOURCE
Start signal
Gate
Reset
t
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the reset input goes OFF.
The start signal disables the timing function (ie., same
function as the gate input).
The control output is controlled using a sustained or
one-shot time period.
H5CLR
TIMER
RUN
OUT
K/P
RESET
h
m
START
GATE
s
RESET
H5CLR
ASY-4DRN / ASY-4DRGN
ASY-4DR
RUN
OUT
K/P
h
RESET
START
m
s
GATE
RESET
ANLY ELECTRONICS CO.
TIMING CHART(Output mode)
B
:
Repeat cycle 1
SOURCE
Start signal
Gate
Reset
t
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON. *Note1
The status of the control output is reversed when time is up
(OFF at start).
B-1
:
Repeat cycle 2
SOURCE
Start signal
Gate
Reset
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON. *Note1
The status of the control output is reversed when time is up
(OFF at start).
B-2
:
Repeat cycle ON start
SOURCE
Start signal
Reset
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON. *Note1
The status of the control output is reversed when time
is up (OFF at start).
C
:
Signal ON/OFF delay
SOURCE
Start signal
Reset
Control output
t
a
t - a
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal goes ON or OFF.
The status of the control output is ON when the start
signal goes ON or OFF.
45
ANLY ELECTRONICS CO., LTD.
(Timer resets when power comes ON.)
(Timer dose not reset when power comes ON.)
(Timer resets when power comes ON.)
(Timer resets when power comes ON.)
DIMENSION(mm)
H5CLR + Y-50 + US-08
TIMER
RUN
OUT
K/P
RESET
h
m
START
GATE
s
RESET
H5CLR
+0.5
-0
ASY-4DRY / ASY-4DRGY + US-08
ASY-4DR
RUN
OUT
K/P
h
RESET
START
m
s
GATE
RESET
ANLY ELECTRONICS CO.
http://www.anly.com.tw
D
:
Signal OFF delay
(Timer resets when power comes ON.)
SOURCE
Start signal
Gate
Reset
Control output
Set value
UP
0
Set value
DOWN
0
The control output is ON when the start signal is ON
(except when the power is OFF or the reset is ON).
The timer is reset when the time is up.
E
:
Interval
(Timer resets when power comes ON.)
SOURCE
Start signal
Gate
Reset
Control output
Set value
UP
0
Set value
DOWN
0
Timing starts when the start signal comes ON. *Note1
The control output is reset when time is up.
F
:
Cumulative
(Timer does not reset when power comes ON.)
SOURCE
Start signal
Gate
Reset
Control output
Set value
UP
0
Set value
DOWN
0
Start signal enables timing (timing is stopped when the start
signal is OFF or when the power is OFF)
A sustained control output is used.
*Note1. While the start signal is ON, the timer starts when power
comes ON or when the reset input goes OFF.
+0.5
45
-0
M-H5CLR-I-A
Printed in Taiwan