6TL YAV90304 Technical Description - Page 7

Browse online or download pdf Technical Description for I/O Systems 6TL YAV90304. 6TL YAV90304 10 pages. 16 digital outputs / 8 digital inputs

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SWITCH CONFIGURATION

Switch

Name

SW1

1 & 2

3 to 8

SW1 behaviour

Switch ID

SW2

BOOT0

SW3

RESET

SW4

CAN-END

Switches description

Pin switch

Switches 1 and 2 set the CAN communication speed:

The logic address is composed by 2 elements: the module

identification and the hardware address. The module identification is

set on firmware and cannot be changed. The hardware address is

selected by switches 3 to 8, being 3 the least significant bit (LSB) and

8 the most significant bit (MSB):

Description

Factory use. Must be OPEN on operation.

Must be OPEN on operation. A temporary bridge causes a reset of the board.

Placing jumper adds a 120 Ohm resistor between the CAN-High and CAN-Low

signals of CAN-Bus.

Definition of Behaviour

00 = 50 kbps

10 = 100 kbps

01 = 125 kbps

11 = 250 kbps

ON=1

OFF=0

1 2 3 4 5 6 7 8

LSB

MSB

Board Address

Definition of Behaviour