Active-semi PAC5532EVK1 User Manual - Page 7

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SWD Debugging

Connector J3 offers access to the PAC5532 SWD port lines.
J3 Pin
Terminal
1
+
2
SD
3
CL
4
-

JTAG Debugging

Connector J13 is a standard MIPI20 offering access to the JTAG port as well as single data line TRACE
debug.
J13 Pins
Terminal
1
VCC
2
SWDIO/TMS
3
GND
4
SWCLK/TCK
5
GND
6
SWO/TDO
7
NC
8
TDI
9
GND
10
NC
11
GND
12
TRACE CLK
13
GND
14
TRACE DATA 0
15
GND
16
TRACE DATA 1
17
GND
18
TRACE DATA 2
19
GND
20
TRACE DATA 3

Serial Communications

Connector J4 offers access to the PAC5532 UART port lines.
J4 Pin
Terminal
1
+
2
TX
3
RX
4
-
Description
VCCIO (default is 3.3V)
SWD Serial Data
SWD Serial Clock
GND (System Ground)
Description
VCC Power
Serial Wire Debug Data Input Output / JTAG Test Mode Select
GND (System GND)
Serial Wire Debug Clock / JTAG Clock
GND (System GND)
Serial Wire Debug Output / JTAG Data Output
Not Connected
JTAG Data Input
GND (System GND)
Not Connected
GND (System GND)
ETM Trace Clock
GND (System GND)
ETM Trace Data 0
GND (System GND)
ETM Trace Data 1
GND (System GND)
ETM Trace Data 2
GND (System GND)
ETM Trace Data 3
Description
VCCIO (default is 3.3V)
MCU Transmit Line (PE3)
MCU Receive Line (PE2)
GND (System Ground)
-
7
-
Rev 1.0 February 2018