Dynamic Engineering PCIe8LXMCX2CB User Manual - Page 12

Browse online or download pdf User Manual for PCI Card Dynamic Engineering PCIe8LXMCX2CB. Dynamic Engineering PCIe8LXMCX2CB 20 pages. Pcie 8 lane 2 position xmc compatible carrier. connector bus version

Print Page

IO0_20P

197

IO0_20N

196

IO0_21P

199

IO0_21N

198

IO0_22P

201

IO0_22N

200

IO0_23P

203

IO0_23N

202

IO0_24P

205

IO0_24N

204

IO0_25P

207

IO0_25N

206

IO0_26P

209

IO0_26N

208

IO0_27P

211

IO0_27N

210

IO0_28P

213

IO0_28N

212

IO0_29P

215

IO0_29N

214

IO0_30P

217

IO0_30N

216

IO0_31P

219

IO0_31N

218

FIGURE 2

IO0 refers to XMC 0 and IO1 refers to XMC1. Resistors are numbered with the "R"

implied (not shown in table). The first and fourth resistor columns are for the standard

IO – SCSI or DIN connector for IO0/IO1. The second and third resistor columns are for

the Connector Bus between XMC0 and XMC1. Both need to be installed to make a

connection on any particular signal.

Convert from signal name to connector pin number with Figure 1. The previous table is

for both XMC positions. Prepend with IO0_ or IO1_ to get the signal name in this table.

The next table is to select which connector Jn4 or Jn6 is tied to each IO defined in the

table able.

325

389

324

388

327

391

326

390

329

393

328

392

331

395

330

394

333

397

332

396

335

399

334

398

337

401

336

400

339

403

338

402

341

405

340

404

343

407

342

406

345

409

344

408

347

411

346

410

PCIE8LXMCX2CB RESISTOR SELECTION IO

Embedded Solutions

261

IO1_20P

260

IO1_20N

263

IO1_21P

262

IO1_21N

265

IO1_22P

264

IO1_22N

267

IO1_23P

266

IO1_23N

269

IO1_24P

268

IO1_24N

271

IO1_25P

270

IO1_25N

273

IO1_26P

272

IO1_26N

275

IO1_27P

274

IO1_27N

277

IO1_28P

276

IO1_28N

279

IO1_29P

278

IO1_29N

281

IO1_30P

280

IO1_30N

283

IO1_31P

282

IO1_31N

Page 12