Fujitsu MB91460 SERIES Application Note - Page 22
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4. The interrupt service routines those have to be accessed while the sector of Main Flash
is erased are also mapped to RAM. We consider that CAN0 and UART0 Receive
interrupt needs to be serviced.
a. The following code does the interrupt level configuration and vector configuration.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
/*
/*---------------------------------------------------------------------------*/
void
InitIrqLevels(void)
{
. . .
ICR16 = 20;
ICR19 = 31;
. . .
}
. . .
extern
__interrupt
extern
__interrupt
. . .
#pragma
intvect CAN0_ISR
#pragma intvect UART0_Rx_ISR
b. The following code links the ISRs to RAM.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.
/*
/*---------------------------------------------------------------------------*/
#pragma
section CODE=IRAM
CAN0_ISR
__interrupt
void
{
. . .
. . .
}
UART0_Rx_ISR
__interrupt
void
{
. . .
. . .
}
MCU-AN-300055-E-V10
INTERRUPTS
Chapter 3 Interrupt Recommendations and Examples
(C) Fujitsu Microelectronics Europe GmbH
/* CAN 0
/* CAN 1
/* USART (LIN) 0 RX
/* USART (LIN) 0 TX
void
CAN0_ISR(void);
void
UART0_Rx_ISR(void);
48
54
(C) Fujitsu Microelectronics Europe GmbH
(void)
(void)
- 22 -
*/
*/
*/
// Prototype
// Prototype
/* CAN 0
/* USART (LIN) 0 RX
© Fujitsu Microelectronics Europe GmbH
*/
*/
*/
*/
*/
*/
*/