Dell PowerEdge R520 Technical Manual - Page 24
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Also for Dell PowerEdge R520: Manual (11 pages), Installation Manual (8 pages), Getting Started Manual (9 pages), Portfolio Manual (27 pages)
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The Dell PowerEdge R520 offers balanced, scalable I/O capabilities, including integrated PCIe 3.0
capable expansion slots.
The R520 system board has one embedded NIC controller. The Broadcom 5720 Gigabit NIC chip is
connected to the platform controller hub through a PCIe 2.0 x2 link.
The Broadcom 5720 is a 14
suitable for high-performance server applications. The Broadcom 5720 combines dual triple-speed
IEEE 802.3 compliant Media Access Controllers (MACs) with dual 10/100/1000 Ethernet transceivers
(PHYs), selectable individually per port, a Network Controller sideband Interface (NC-SI) and on-chip
memory buffer in a single device. The device provides a PCIe 2.1-compliant interface, which
operates at 5 GT/s or 2.5 GT/s x2 link width.
The R520 provides expanded PCIe slot capability over the previous servers. This is made possible by
the 24 PCIe lanes available from each processor in the system. Dell designed the R520 to be PCIe
3.0-compliant in order to take full advantage of the processor capabilities.
The R520 supports up to four PCIe slots. PCIe connectivity is integrated with the processor in that
the number of processors in a system impacts the number of PCIe slots and the bandwidth of each
PCIe slot. Table 13 lists the slot configurations for the R520.
One processor
PCIe Slot 1
PCIe x8 connector with x4 bandwidth;
half-length, half-height, 2.0
(from PCH)
PCIe Slot 2
PCIe x16 connector with x8 bandwidth;
full-length, full-height, 3.0
(from CPU1)
PCIe Slot 3
PCIe x8 connector with x4 bandwidth;
half-length, full-height, 3.0
(from CPU1)
PCIe Slot 4
PCIe x8 connector with x4 bandwidth;
half-length, full-height, 3.0
(from CPU1)
th
generation 10/100/1000BASE-T Ethernet LAN controller solution
Two processors
PCIe x16 connector with x16 bandwidth;
half-length, half-height, 3.0
(from CPU2)
PCIe x16 connector with x8 bandwidth;
full-length, full-height, 3.0
(from CPU1)
PCIe x16 connector with x8 bandwidth;
half-length, full-height, 3.0
(from CPU1)
PCIe x16 connector with x8 bandwidth;
half-length, full-height, 3.0
(from CPU2)