Digilent DXC95 Reference Manual - Page 2

Browse online or download pdf Reference Manual for Motherboard Digilent DXC95. Digilent DXC95 6 pages.

Digilab XC95 Reference Manual

Functional description

The Digilab DXC95 board has been designed to offer a low-cost and minimal system for designers
who need a flexible platform to gain exposure to Xilinx CPLDs, or for those who need to prototype
CPLD-based designs rapidly. The DXC95 board also has an external JTAG port – in a lower-cost
configuration, the board can be used to program Digilab peripheral boards (such as the DIO2 or AIO1
boards). The DXC95 board provides only the essential supporting devices for the 95108 CPLD, and
routes all available CPLD signals to standard expansion connectors. Included on the board are a 5VDC
regulator, a JTAG configuration circuit that uses a standard parallel cable, a 1.8MHz oscillator, and a
pushbutton and LED for rudimentary I/O.
The DXC95 board has been
designed to serve as a host for
various peripheral boards. The
expansion connectors on the
board mate with standard 40-pin,
100 mil spaced DIP headers
available from any catalog
distributor. Each of the expansion
connectors provides the
unregulated supply voltage (VU),
5V, GND, and 37 CPLD signals
to peripheral boards, so system
designers can quickly develop
application- specific peripheral
boards. Digilent also produces a
collection of expansion boards
with commonly used devices. See
the Digilent website
(www.digilentinc.com) for a
listing of currently available
boards.
Table 1 shows all signals routed on the DXC95 board. These signals and their circuits are described in
the following sections.
Parallel port and FPGA configuration circuit
The DXC95 board uses a DB-25 parallel port connector to route JTAG programming signals from a
host computer to the CPLD and to the F expansion connector. Three-state buffers, controlled by an
user-settable switch, determine whether the JTAG port is mapped to the on-board device or to the
expansion connector. With this circuit, the on-board CPLD or a peripheral board CPLD can be
configured using the JTAG protocol over the parallel cable. The JTAG programming circuit follows
the schematic available from Xilinx, so the DXC95 board is fully compatible with all Xilinx
programming tools. The JTAG circuit is shown in the diagram below.
Rev: May 7, 2002
Power Supplies
VU
Unregulated power supply voltage – depends on power
supply used. Must be between 5VDC and 10VDC. Routed to
regulators and expansion connectors only.
VCC
VCC for all devices, routed on inner PCB plane. 1.5A can be
drawn with less than 20mV ripple (typical)
GND
System ground routed to all devices on PCB ground plane
Programming and parallel port
PWT
Feedback of TDO signal
PPO
Cable detect signals used by Xilinx programmer
TMS-L
Local TMS signal (used for JTAG programming)
TCK-L
Local TCK signal (used for JTAG programming)
TDI-L
Local TDI signal (used for JTAG programming)
TMS-E
External TMS signal (used for JTAG programming)
TCK-E
External TCK signal (used for JTAG programming)
TDI-E
External TDI signal (used for JTAG programming)
On board devices
BTN1
Pushbutton input
LED1
User-controllable status LED
MCLK
CMOS oscillator connected to global clock input
Expansion Connectors
E4-E40
E bus signals connecting the E connector to the FPGA
F4-F40
F bus signals connecting the F connectors to the FPGA
Table 1. DXC95 board signal definitions
www.digilentinc.com
Digilent, Inc.
Page 2 of 6