Digilent chipKIT Basic I/O Shield Reference Manual - Page 4

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chipKIT™ Basic I/O Shield™ Reference Manual
2

Hardware Description

The following is a description of the Basic I/O Shield and how to use it. See Appendix A for pin definitions and
Appendix B for sample code to use the OLED graphic display.
2.1
OLED Graphic Display
The Basic I/O Shield provides a 128x32 pixel organic LED (OLED) graphic display panel, the WiseChip/Univision UG-
23832HSWEG04. The UG2832 uses the Soloman Systech SSD1306 display controller.
Note: The UG2832 has a power on/power off sequence that should be followed. Failure to follow the power
on/power off sequence can shorten the life of the display.
The Basic I/O provides two FETs for software control of the two power supplies for the display. The VDD_EN
control is used to toggle the power to the logic of the display. The VBAT_EN control is used to toggle power to the
OLED display itself. These two pins have pull-up resistors to turn off their respective power supplies when not
being driven. The pin is made an output and driven low to turn on the power supply.
Power on sequence:
1. Apply power to VDD.
2. Send Display Off command.
3. Initialize display to desired operating mode.
4. Clear screen.
5. Apply power to VBAT.
6. Delay 100ms.
7. Send Display On command.
Power off sequence:
1. Send Display Off command.
2. Power off VBAT.
3. Delay 100ms.
4. Power off VDD.
The display has a D/C pin (display or command select) that is used to determine whether bytes sent to the display
are interpreted as commands or as display data. The D/C pin is set high for display buffer access and low for
command access.
The RES pin is used to reset the SG1306 display controller. The RES pin is driven low for reset and driven high for
normal operation. The low-going reset pulse must be a minimum of 3us (microseconds) for the display controller
to reset correctly.
The UG2832 is a serial device that is accessed using SPI. It is however, a write-only device. It is not possible to read
back either the display buffer contents or any kind of status from the panel. The maximum SPI clock frequency
supported by the UG2832 is 10MHz. Due to pin limitations between the Basic I/O Shield and the Uno32 board, the
select pin (SS) is wired low on the Basic I/O Shield and the display is always enabled to receive data over the SPI
interface.
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