Digilent PmodTMP2 Reference Manual - Page 2

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PmodTMP2™ Reference Manual
ADT7420. If the master does not generate a restart condition prior to attempting the read, then the value written
to the address register will be reset to 0x00.
As some registers stored 16-bit values as 8-bit register pairs, the ADT7420 will automatically increment the address
register of the device when accessing certain registers such as the temperature registers and the threshold
registers. This allows for the master to use a single read or write request to access both the low and high bytes of
these registers. A complete listing of registers and their behavior can be found in the ADT7420 datasheet available
on the Analog Devices web site.
Header J1
Pin
Signal
Description
1 & 5
SCL
Serial Clock
2 & 6
SDA
Serial Data
3 & 7
GND
Power Supply Ground
4 & 8
VCC
Positive Power Supply
2
The I
C interface standard uses two signal lines. These are I
data (SDA) and serial clock (SCL) respectively on the ADT7420.
2
The PmodTMP2 I
C bus can be set to use one of four valid addresses. The top five bits of the address are fixed, and
the two least significant bits are taken from the jumper states of JP2 and JP1. JP2 corresponds to bit one of the
address while JP1 corresponds to bit zero. An open jumper corresponds to a one in the address while a shorted
jumper corresponds to a zero. For example, when JP2 and JP1 are open the device uses the address 0x4B
(0b1001011).
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Connector J1 – I2C Communications
Pin
Signal
Description
1, 2
SCL
I2C Clock
3, 4
SDA
I2C Data
5, 6
GND
Power Supply Ground
7, 8
VCC
Power Supply (3.3V/5V)
Table 1. Interface connector signal description.
Jumper Block
JP1
JP2
Header Name
J2
J3
Table 2. Pinout description table.
Addresses
JP2
JP1
Address
Open
Open
0x4B (0b1001011)
Open
Shorted
0x4A (0b1001010)
Shorted
Open
0x49 (0b1001001)
Shorted
Shorted
0x48 (0b1001000)
Table 3. I2C address selection.
Jumper Blocks
State
Description
Open/Shorted
Address bit 0 high/low
Open/Shorted
Address bit 1 high/low
User Outputs
Pin Name
Description
CT
Critical Threshold Output
INT
Interrupt Output
2
2
C data and I
C clock. These signals map to the serial
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