Motorola GP320 Series Service Information - Page 14
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2-4
THEORY OF OPERATION
The output of the bandpass filter is coupled to the RF amplifier transistor Q301 via C307. After being
amplified by the RF amplifier, the RF signal is further filtered by a second varactor tuned bandpass
filter, consisting of L306, L307, C313, C317, CR304 and CR305.
Both the pre and post-RF amplifier varactor tuned filters have similar responses. The 3 dB
bandwidth of the filter is approximately 50 MHz. This enables the filters to be electronically
controlled by using a single control voltage from DACRx.
The output of the post-RF amplifier filter is connected to the passive double balanced mixer
consisting of components T301, T302, and CR306. Matching of the filter to the mixer is provided by
C381. After mixing with the first local oscillator (LO) signal from the voltage controlled oscillator
(VCO) using low side injection, the RF signal is down-converted to a 45.1 MHz IF signal.
The IF signal coming out of the mixer is transferred to the crystal filter (FL301) through a resistor
pad and a diplexer (C322 and L310). Matching to the input of the crystal filter is provided by C324
and L311. The crystal filter provides the necessary selectivity and intermodulation protection.
3.2
Receiver Back-End
(Refer to Figure 2-2 and the UHF Receiver Back End schematic diagram)
The output of crystal filter FL301 is matched to the input of IF amplifier transistor Q302 by
components L322 and C325. Voltage supply to the IF amplifier is taken from the receive 5 volts
(R5). The IF amplifier provides a gain of about 7dB. The amplified IF signal is then coupled into
U301(pin 3) via C330, C338 and L330 which provides matching for the IF amplifier and U301.
The IF signal applied to pin 3 of U301 is amplified, down-converted, filtered, and demodulated, to
produce recovered audio at pin 27 of U301. This IF IC is electronically programmable, and the
amount of filtering, which is dependent on the radio channel spacing, is controlled by the
microprocessor. Additional filtering, once externally provided by the conventional ceramic filters, is
replaced by internal filters in IF module U301.
The IF IC uses a type of direct conversion process, whereby the externally generated second LO
frequency is divided by two in U301 so that it is very close to the first IF frequency. The IF IC (U301)
synthesizes the second LO and phase-locks the VCO to track the first IF frequency. The second LO
is designed to oscillate at twice the first IF frequency because of the divide-by-two function in the IF
IC.
In the absence of an IF signal, the VCO searches for a frequency, or its frequency will vary close to
twice the IF frequency. When an IF signal is received, the VCO locks onto the IF signal. The second
LO/VCO is a Colpitts oscillator built around transistor Q320. The VCO has a varactor diode, CR310,
to adjust the VCO frequency. The control signal for the varactor is derived from a loop filter
consisting of components C362, C363, C364, R320 and R321.
The IF IC (U301) also performs several other functions. It provides a received signal-strength
indicator (RSSI) and a squelch output. The RSSI is a dc voltage monitored by the microprocessor,
and used as a peak indicator during the bench tuning of the receiver front-end varactor filter. The
RSSI voltage is also used to control the automatic gain control (AGC) circuit at the front-end.
The demodulated signal on pin 27 of U301 is also used for squelch control. The signal is routed to
U404 (ASFIC) where squelch signal shaping and detection takes place. The demodulated audio
signal is also routed to U404 for processing before going to the audio amplifier for amplification.