ARP 1601 Service Manual - Page 6

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POSITIONS
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F/G. 2.2
SEQUENCER OUTPUTS
SECTION
3
CIRCUIT DESCRIPTIONS
3.1
Clock
On/Off
3.2
One
Shot
Gate
signals
applied to the
start
jack
set
the
Q
output
of
Z2B
to
logic
1
(+15
volts)
and
Q
bar to
logic
(0
volts).
Gate
signals
applied to the stop jack
set
the
Q
output
of
Z2B
to
logic
and
the
Q
bar to
logic
1
.
Each
time
a
gate
signal
is
applied to the
start/stop
jack or
when
the
start/stop
button
is
depressed, the
Q
output
of
Z2B
assumes
the
logic
level
of the
Q
bar
output
so that the
Q
and
Q
bar
outputs
reverse
state.
When
the Gate/Trigger switch
(S2)
is
in
the gate
position,
the
Q
output
will
assume
a
logic
1
state
for
as
long
as
a
gate
is
present
on
the start/stop
jack.
Summary:
For
a
clock
"on"
state,
the
Q
output
of
Z2B
(B point)
will
be
a
logic
1.
For
a
clock "off"
state,
the
Q
output
is
a
logic
0.
A
4
millisecond pulse occurs
on
the
Q
output
of
Z11A
when
pulsed
on
the
A
input
(pin
5).
The
pulse
on
the
output
of the
one
shot
is
supplied
to:
1)
the
Clock
Oscillator to reset
the
sawtooth:
2)
the
Reset
circuit
to
lengthen the external
reset
pulse
(if
applied)
when
the E point
is
at
a
logic
1;
and
3)
the
Randomizer
circuit
to
momentarily
disable
the
high
frequency
oscillator
(random
mode
only).
3.3
Clock
Oscillator
Three
circuits
comprise
the
Clock
Oscillator:
the
Voltage
Controlled
Oscillator,
Sawtooth
to
Pulse
Converter,
and Comparator.
Sawtooth
Oscillator:
Voltages
from
the clock
FM
input jack
and
the clock
rate slider are
summed
on