ClearSpeed ClearSpeed Advance e720 User Manual - Page 6

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Features and general description

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Features and general description
The Advance e720 accelerator card (shown in
double-precision, floating-point accelerator. It is designed for use in HP blade servers and
systems that provide Type II mezzanine compatible connectors.
The Advance e720 accelerator card uses a single CSX700 processor. The processor
implements the PCI Express host interface, permitting high data transfer rates directly with
the processor. To manage the e720, an FPGA device is used. The firmware represents the
FPGA design image and can be upgraded, as described in the [5], Firmware Update
Release Notes.
The Advance e720 accelerator card uses dual channel bus-mastering DMA to achieve a
high peak bandwidth to the host system. Each card has 2 GBytes of local card memory with
error correction. It includes onboard temperature monitoring of the processor and board.
The Advance e720 accelerator card features the CSX700 data-parallel floating-point
coprocessor. The processor is energy efficient providing 3.84 GFLOPS per watt
(96 GFLOPS/25 watts). Each processor consists of two computation arrays, each are fully
interconnected through a common address map, including access to the 1 GByte of local
DDR2 SDRAM attached to each array, giving a total of 2 GBytes for the card. The DRAM is
72 bits wide, including 8 bits of error correcting code (ECC). This allows correction of
single-bit errors and detection of multiple-bit errors.
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Advance
Figure 2. Advance CSX700 mezzanine card.
ClearSpeed Technology plc
TM
e720 Accelerator Card User Guide
Figure
2) is based on the CSX700
Document No. 06-UG-1588 Revision: 1.B