Cypress F2MC-8FX Series Application Note - Page 6
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3
Interval Time
This chapter describes the interval time of the watchdog timer
The interval times of the watchdog timer are shown in
watchdog reset is generated between the minimum time and the maximum time.
Table 2. Interval Times of Watchdog Timer
Count clock type
Timebase timer output
(main clock = 4MHz)
Watch prescaler output
( sub-clock = 32.768KHz)
Sub-CR timer
(sub-CR clock = 50-200KHz)
*1: CS [1:0] = 00
, CSP = 1
B
The interval time varies depending on the timing of clearing the watchdog timer.
between the timing of clearing the watchdog timer and the interval time when the timebase timer output 2
main clock) is selected as the count clock (main clock = 4MHz).
Please note that program must clear the counter of the watchdog timer within the minimum time.
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Count clock switch bit
CS[1:0], CSP
000
(SWWDT)
B
010
(SWWDT)
B
100
(SWWDT)
B
110
(SWWDT)
B
XX1
(SWWDT) or HWWDT*
B
(read only)
B
Figure 5. Clearing Timing and Interval Time of Watchdog Timer
Document No. 002-05336 Rev.*A
F²MC-8FX Family, MB95200H/210H Series Watchdog Timer
Table
2. If the counter of watchdog timer is not cleared, a
Minimum time
21
2
/F
524 ms
CH
20
2
/F
262 ms
CH
14
2
/F
500 ms
CL
13
2
/F
250 ms
CL
1
16
2
/F
328 ms
CRL
Interval time
Maximum time
1.05 s
524 ms
1.00 s
500 ms
2.62 s
Figure 5
shows the correlation
21
/F
CH
(F
:
CH
5