Cypress Semiconductor CY7C1297H Specification Sheet - Page 12

Browse online or download pdf Specification Sheet for Computer Hardware Cypress Semiconductor CY7C1297H. Cypress Semiconductor CY7C1297H 16 pages. Cypress 1-mbit (64k x 18) flow-through sync sram specification sheet

Timing Diagrams
(continued)
[16, 18, 19]
Read/Write Timing
CLK
t
CH
t ADS
t ADH
ADSP
ADSC
t AS
t AH
A1
A2
ADDRESS
BWE, BW
[A:B]
t CES
t CEH
CE
ADV
OE
High-Z
Data In (D)
Data Out (Q)
Q(A1)
Back-to-Back READs
Notes:
18. The data bus (Q) remains in High-Z following a Write cycle unless an ADSP, ADSC, or ADV cycle is performed.
19. GW is HIGH.
Document #: 38-05669 Rev. *B
t CYC
t
CL
A3
t
t
WEH
WES
t DS
t DH
D(A3)
t
OEHZ
Q(A2)
Single WRITE
A4
t OELZ
t CDV
Q(A4)
Q(A4+1)
Q(A4+2)
BURST READ
DON'T CARE
UNDEFINED
CY7C1297H
A5
A6
D(A5)
D(A6)
Q(A4+3)
Back-to-Back
WRITEs
Page 12 of 15
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