Cypress Semiconductor STK11C88 Specification Sheet - Page 11
Browse online or download pdf Specification Sheet for Computer Hardware Cypress Semiconductor STK11C88. Cypress Semiconductor STK11C88 16 pages. 256 kbit (32k x 8) softstore nvsram
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Software Controlled STORE/RECALL Cycle
The software controlled STORE/RECALL cycle follows.
Parameter
Alt
t
t
RC
AVAV
[11]
t
t
SA
AVEL
[11]
t
t
CW
ELEH
[11]
t
t
HACE
ELAX
[11]
t
RECALL
Switching Waveforms
ADDRESS
t
SA
CE
OE
DQ (DATA)
Notes
11. The software sequence is clocked on the falling edge of CE without involving OE (double clocking abort the sequence).
12. The six consecutive addresses must be read in the order listed in the Mode Selection table. WE must be HIGH during all six consecutive cycles.
Document Number: 001-50591 Rev. **
[11, 12]
Description
STORE/RECALL Initiation Cycle Time
Address Setup Time
Clock Pulse Width
Address Hold Time
RECALL Duration
Figure 10. CE Controlled Software STORE/RECALL Cycle
t
RC
A
D
D
R
E
S
S
#
1
t
SCE
t
HACE
DATA VALID
25 ns
Min
Max
25
0
20
20
20
[12]
t
RC
A
D
D
R
E
S
S
#
6
t
/ t
STORE
RECALL
HIGH IMPEDANCE
DATA VALID
STK11C88
45 ns
Unit
Min
Max
45
ns
0
ns
30
ns
20
ns
μs
20
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