Cypress Semiconductor STK14C88-5 Specification Sheet - Page 5
Browse online or download pdf Specification Sheet for Computer Hardware Cypress Semiconductor STK14C88-5. Cypress Semiconductor STK14C88-5 18 pages. 256 kbit (32k x 8) autostore nvsram
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Data Protection
The STK14C88-5 protects data from corruption during low
voltage conditions by inhibiting all externally initiated STORE
and WRITE operations. The low voltage condition is detected
when V
is less than V
CC
SWITCH
WRITE mode (both CE and WE are low) at power up after a
RECALL or after a STORE, the WRITE is inhibited until a
negative transition on CE or WE is detected. This protects
against inadvertent writes during power up or brown out condi-
tions.
Noise Considerations
The STK14C88-5 is a high speed memory. It must have a high
frequency bypass capacitor of approximately 0.1 µF connected
between V
and V
using leads and traces that are as short
CC
SS,
as possible. As with all high speed CMOS ICs, careful routing of
power, ground, and signals reduce circuit noise.
Hardware Protect
The STK14C88-5 offers hardware protection against inadvertent
STORE operation and SRAM WRITEs during low voltage condi-
tions. When V
<V
CAP
SWITCH
operations and SRAM WRITEs are inhibited. AutoStore can be
completely disabled by tying VCC to ground and applying + 5V
to V
. This is the AutoStore Inhibit mode; in this mode,
CAP
STOREs are only initiated by explicit request using either the
software sequence or the HSB pin.
Low Average Active Power
CMOS technology provides the STK14C88-5 the benefit of
drawing significantly less current when it is cycled at times longer
than 50 ns.
Figure 5
and
between I
and READ or WRITE cycle time. Worst case current
CC
consumption is shown for both CMOS and TTL input levels
(commercial temperature range, VCC = 5.5V, 100% duty cycle
on chip enable). Only standby current is drawn when the chip is
disabled. The overall average current drawn by the STK14C88-5
depends on the following items:
■
The duty cycle of chip enable
■
The overall cycle rate for accesses
■
The ratio of READs to WRITEs
■
CMOS versus TTL input levels
■
The operating temperature
■
The V
level
CC
■
IO loading
Document Number: 001-51038 Rev. **
. If the STK14C88-5 is in a
, all externally initiated STORE
Figure 6
shows the relationship
Figure 5. Current Versus Cycle Time (READ)
Figure 6. Current Versus Cycle Time (WRITE)
Preventing Store
The STORE function is disabled by holding HSB high with a
driver capable of sourcing 30 mA at a V
because it has to overpower the internal pull down device. This
device drives HSB LOW for 20 μs at the onset of a STORE.
When the STK14C88-5 is connected for AutoStore operation
(system V
connected to V
CC
CC
and V
crosses V
on the way down, the STK14C88-5
CC
SWITCH
attempts to pull HSB LOW. If HSB does not actually get below
V
, the part stops trying to pull HSB LOW and abort the STORE
IL
attempt.
STK14C88-5
of at least 2.2V,
OH
and a 68 μF capacitor on V
CAP
Page 5 of 17
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