EG&G ORTEC 427 Instruction Manual - Page 14

Browse online or download pdf Instruction Manual for Amplifier EG&G ORTEC 427. EG&G ORTEC 427 20 pages. Delay amplifier

Print Page

CIRCUIT DESCRIPTION

The circuit of the 427 consists of three basic sections. (See Drawings 427-0100-Bl

and 427-0100-Sl .) The input section is a feedback amplifier loop, Ql, Q2, and

Q3. The gain of this loop is changed to compensate for the delay line loss by

changing Ry. The second section includes the five delay lines and their associated

switches. The last section is the output coble driver loop, composed of transistors

Q4 through Q7.

5.1

The input section is a basic current feedback amplifier composed of Ql and Q2

with an additional emitter-follower, Q3, added to make the loop linearly pass

both positive and negative signals. The gain of this loop is:

R2+R3+R37+R38+R39+R40+R41+R42

(See Drawings 427-0100-Bl and 427-0100-51 .) Each time a delay line is switched

into the circuit, the closed loop gain is increased to compensate for the signal loss

in the delay Iine. The gain of this loop is increased by reducing Ry; e.g., short

circuiting R37 when the 0.25-microsecond delay line is inserted in the signal path.

5.2

The second section is composed of the five delay lines and their associated switches.

These are 4PDT switches. The first pole of each switch is used to increase the gain

of the first amplifier loop to compensate for the signal loss in the delay line. The

second pole of each switch is grounded to prevent signal feedthrough in the switch.

The third and fourth poles are used to connect the delay lines in series with the

signal path or remove them from the circuit. Al l or any combination of these delay

lines may be inserted in series to give a total delay of 4.75 microseconds. Resistors

R1 1 and R12 are used to terminate the delay lines at both ends to minimize impedance

mismatch and resultant pulse reflections on the lines.

5.3

The second amplifier loop consists of a cable driver with the addition of Q5 to

regulate the emitter voltage of Q4. The output driver loop consists of transistors

Q4, Q6, Q7, and Q8. Q4 and Q6 constitute the typical npn-pnp loop; they

drive quite wel l in the negative direction but not in the positive direction. The

addition of emitter-fol lower Q7 in this loop allows the overall loop to handle both

positive and negative signals quite easily to plus and minus 11 volts into a 100-ohrn

load, but an accidental short circuit of the output wil l cause Q7 to be destroyed.

The addition of Q8 serves to protect Q7. The function of Q8 is to provide a method

of limiting the average current through Q7 to a value less than that required to

destroy Q7. Q8 can supply large peak currents from the col lector capacitors C13

and C14; these currents can flow directly through Q8 and Q7 and thence into the

load.