Danville Signal Processing dspblok 21469 Gebruikershandleiding - Pagina 9
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Hardware Overview
The dspblok 21469 is a small module measuring 60mm x 60mm (2.36" x 2.36"). JH2 and JH4 – JH8 are
2mm male headers that are installed on the bottom side of the pc assembly. JH1 and JH3 are mounted on
the top side of the pc assembly. If mating 2mm female headers (4.3mm ht.) are used, the pc assembly will
be about ¼" above the mating pc board. This allows standard (0.250") standoffs to be used with the corner
mounting holes if desired. The hole size is 2.3mm – suitable for 2-56 or M2 screws.
FLASH
EEPROM
DDR2
ADSP-21469
JTAG
60.00 [2.36]
Power Supply
There are two power supply connections to the dspblok: DSP core (Vdd) and DSP I/O and Memory
(Vd+3.3). The DSP core supply may range from 3.3V to 5V. This is the input to an on-board switching
power supply that supplies 1.1V to the ADSP-21469. DO NOT use a higher voltage supply for the core
supply input (JH4-Vdd).
A single 3.3V supply is all that is required to power the dspblok 21469, but in some cases, a 5V supply may
be more convenient. The DSP I/O and Memory supply must be 3.3V.
For example, a product may already have a switching supply that converts directly to 3.3V. In this case, it
may be desirable to supply both the DSP core and the dspblok Vd+3.3 (I/O) from this supply.
Alternatively, a product might have a 5V supply (perhaps from an external power supply module). A simple
LDO fixed regulator could be used to create 3.3V from this supply. Most high-speed devices, including the
ADSP-21469, draw most of their power from their core supplies. In this scenario, it makes no sense to
power the dspblok core with 3.3V since the LDO would be dissipating the excess voltage as heat. If the I/O
requirements are modest, the power dissipation in the LDO might not be significant
Power consumption is largely a function of the temperature of (leakage current) of the ADSP-21469. It is also
a function of the core clock and the computation tasks that are being executed on the DSP. The highest
consumption occurs when the DSP is performing continuous floating point operations at maximum core
clock (450MHz) and at maximum temperature. Accessing external I/O such as the DRAM or other
peripherals consumes less power in the benchmarks that we have performed. The following table shows
power consumption measurements for a typical dspblok 21469 operating in a variety of configurations all at
dspblok™ 21469 User Manual
•
CORE PS
•
•
60.00 [2.36]
•
•
•
•
JH1 – JTAG (connects to external ICE)
JH2 – DAI, DPI, I/O, SPI & System
JH3 – Clock & Boot Configuration)
JH4 – Power & Ext Clock
JH5, JH7 – Data Bus
JH6 – Link Ports
JH8 – dspBootloader Mode
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