Dialog Semiconductor SLG46824 Handleiding voor programmering - Pagina 13

Blader online of download pdf Handleiding voor programmering voor {categorie_naam} Dialog Semiconductor SLG46824. Dialog Semiconductor SLG46824 15 pagina's. In-system

ISPG-SLG46824/6
SLG46824/6
6

Protection for Emulated EEPROM

The SLG46824/6 utilizes a software scheme that allows a portion or the entire emulated EEPROM
being written/ erased to by modifying the contents of the Write Protection Register (WPR). If desired, the WPR can be set so that
it may no longer be modified/erased, thereby making the current protection scheme permanent. The status of the WPR can be
determined by following a Random Read sequence. Changing the state of the WPR is accomplished with a Byte Write sequence
with the requirements outlined in this section.
The WPR register is located on I
the WPR bit functions are included in
Table 4: Write/Erase Protect Register Format
b7
WPR
Table 5: Write/Erase Protect Register Bit Function Description
Bit
Name
2
WPRE
Register Enable
WPB1
1:0
WPB0
Write Protect Enable (WPRE): The Write Protect Enable Bit is used to enable or disable the device Software Write/Erase Protect.
A Logic 0 in this position will disable Software Write/Erase Protection, and a Logic 1 will enable this function.
Write Protect Block Bits (WPB1:WPB0): The Write Protect Block bits allow four levels of protection of the Memory Array, provided
that the WPRE bit is a Logic 1. If the WPRE bit is a Logic 0, the state of the WPB1:0 bits have no impact on device protection.
Protect Lock Bit (PRL): The Protect Lock Bit is used to permanently lock the current state of the WPR, as well as RPR and NPR.
A Logic 0 indicates that the WPR, RPR, and NPR can be modified, whereas a Logic 1 indicates the WPR, RPR, and NPR has
been locked and can no longer be modified. The PRL register bit is located at reg <1824>.
2
C Block Address = 000b, I
Table
5.
b6
b5
Type
Description
Write Protect
0: No Software Write Protection enabled (default)
R/W
1: Write Protection is set by the state of WPB[1:0] bits
R/W
00: Upper quarter of emulated EEPROM
(default)
Write Protect
01: Upper half of emulated EEPROM
Block Bits
R/W
10: Upper 3/4 of emulated EEPROM
11: Entire emulated EEPROM
Revision 1.1
2
C Word Address = E2H.The WPR format is shown in
b4
b3
(Note 2)
13 of 15
(Note 2)
to be inhibited from
Table
b2
b1
WPRE
WPB1
(Note 2)
is write protected
(Note 2)
is write protected
(Note 2)
is write protected.
is write protected.
4-Mar-2019
© 2019 Dialog Semiconductor
4, and
b0
WPB0