Digilent NetFPGA-SUME Referentiehandleiding - Pagina 10
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NetFPGA-SUME™ Reference Manual
The AUXFAULTB pins of the two LTC2974s are connected in a wire-and fashion to the cathode of a Shottky diode
via the AUXFAULT net, as shown in Fig. 10. The anode of the Shottky diode is connected to pin M41 on the FPGA
via the PCON_AUXFAULT_B net and protects the FPGA pin from high voltages. The LTC2974s are configured to
drive the AUXFAULTB pin low when any of the follow conditions occur:
Output overvoltage fault on any channel
Output over current or under current fault on any channel
When any of the above conditions occur, the AUXFAULT net will be driven low, which causes the
PCON_AUXFAULT_B net to be pulled low through the diode. The AUXFAULT net will remain driven low until
LTC2974 experiencing the fault condition is commanded to re-enter the ON state. Enabling the internal pull-up on
pin M41 will allow the FPGA application to detect when one of the faults described above has occurred.
The FAULTB1 pin of the LTC2974 is bi-directional open-drain input/output that can be configured to drive low in
response to any channel entering a "faulted off state". The LTC2974 can also be configured to disable any given
channel in response to a logic low being detected on the FAULTB1 pin. However, it has been pre-configured by
Digilent during manufacturing to serve strictly as an output that indicates when any channel has faulted off.
The FAULTB1 pin of the two LTC2974s are connected in a wire-and fashion to the gate of a transistor (N-FET). This
transistor connects to the PCON_FAULT1 net, which is in turn connected to pin N40 of the FPGA, as shown in Fig.
11. When neither of the FAULTB1 pins is asserted low, the gate of the transistor is pulled high and the
PCON_FAULT1 net is connected to ground. When any channel enters the "faulted off state," the gate of the
transistor is driven low and the transistor turns off. Enabling an internal pull-up on pin N40 will allow the FPGA
application to detect logic '1' when any channel has faulted off and logic '0' when no channels have faulted off.
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Figure. 10. AUXFUALTB interrupt source.
Figure 11. FAULTB1 interrupt source.
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