Cisco 1605 - Router - EN Gebruikershandleiding - Pagina 5

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Universal Asynchronous Receiver−Transmitter (UART)UART is an SCC integrated on the

M68360. It provides the necessary user interface. It has one RS232 port, and a data communications

equipment (DCE) (console) RJ45.

Note: UART has no Auxiliary (data terminal equipment − DTE) port. Higher console speeds (up to

115.2 Kbps) are supported. The download of Cisco IOS software images over the console port is

supported through xmodem or ymodem.

WAN interface cards (WIC)WICs are media−specific network interfaces responsible for data

transfer in and out of the 160x series router. WICs communicate with the CPU through the CPU Bus

for packet transfer. Specialized Controllers (or application−specific integrated circuits − ASICs) used

for media support perform the above−mentioned functionality. WICs do not support Online Insertion

and Removal (OIR).

Power supplyPower supply provides power to various components of the router.

Memory Details

Different kinds of memory reside in the Cisco 1600 Series Router, and each of them is handled in a different

way and for different purposes.

Figure 7 Memory Details

DRAM

DRAM is logically divided into Main Processor memory and Shared Input/Output (I/O) memory.

Main Processor MemoryIt is used to store routing tables, fast switching cache, running

configuration, and so on. It can take unused shared I/O memory, if needed.

Shared I/O MemoryIt is used for temporary storage of packets in system buffers at the time of

process switching, and interface buffers during fast switching. Cisco 1600 Series Routers running

Cisco IOS software versions prior to the integration of CSCdk40685 (

fixed I/O memory of 512 KB. After CSCdk40685, if the router has enough memory, it allocates 25%

to I/O memory. If not, I/O memory remains at 512 KB.

You can use the show memory summary command to see the distribution of DRAM memory.

Router−1600#show memory summary

Processor

I/O

....

! −−− Output Suppressed

Physically, DRAM is a combination of 2 MB on−board non−parity chips, and one Single In−line Memory

Module (SIMM) [72−pin, 60 ns, with or without parity]. If SIMM is non−parity, total DRAM can be up to 18

Cisco − Cisco 1600 Series Router Architecture

Head

Total(b)

20B3A7C

13419908

2D80000

4718592

Used(b)

Free(b)

2334632

11085276

247324

4471268

registered customers only

) have a

Lowest(b)

Largest(b)

10907924

10907920

4466128

4464852