Toshiba TLP-711U Technisch trainingshandboek - Pagina 15
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4-3. Power Supply Reset Process
4-3.
Power Supply Reset Process
In the power supply reset process, power supply reset IC
(RN5VD27A), QL005 is employed.
The reset IC,QL005, develops the reset signal when the
power supply voltage for the microprocessor varies and
becomes lower than the specified voltage, and sends the
signal to the reset terminal of the system microprocessor
(QL001).
4-4. Non-volatile Memory Process
4-4.
Non-volatile Memory Process
In the non-volatile memory process, data reading and
saving for various adjustments are carried out on the
non-volatile memory, QL002 (CAT24C16J).
When the power (AC) is on, all the adjustment data are
read out by the system microprocessor (QL001), then the
previous status is realized.
When saving the data, all the adjustment data are written
by the system microprocessor (QL001), then the current
status is preserved.
However, if a failure (such as power interruption due to
lightning, etc.) occurs during the adjustment data writing,
a data error may occur. If the data is determined as
incorrect, the initial data memorized on the system
microprocessor (QL001) is read out and stored on the
non-volatile memory.
4-5. Remote Control Reception Process
4-5.
Remote Control Reception Process
In the remote control reception process, a remote control
unit (CT-9925) connected to the remote control terminal
emits a remote control signal and a remote control signal
receive section on the front panel, the rear panel or the
camera arm (for TLP711) decodes the signal.
The remote control signals for rear panel and camera
section (for TLP711) are selected by two buffers of
QL003 (74HC14AF) and QL004 (TC74HC125AF).
Then the signal mixed with the remote control signal for
front panel.
Finally, the signal mixed is supplied to the remote control
terminal of the system microprocessor (QL001).
4-6. RS-232C Transmission/Reception
4-6.
RS-232C Transmission/Reception
Process
Process
In the RS-232C reception process, an RS-232C signal
entered through the RS-232C connector (D-SUB 9P) is
decoded in the RS-232C interface (µPD4721) of QL013,
and fed to RXD1 terminal of the system microprocessor
(QL001).
In the RS-232C transmission process, RS-232C signal
developed from TXD0 terminal of the system micropro-
cessor (QL001) is decoded in the RS-232C interface
(µPD4721) of QL013 and fed to the camera micropro-
cessor section.
4-7. Status Read Process
4-7.
Status Read Process
In the status read process, QF202 (M62320FP) and
QF203 (M62320FP) read the key information on the unit
side. QF205 (M62320FP) reads various error informa-
tion.
Table 4-7-1 shows the contents and logic of the status
read signals.
4-8. Status Display Process
4-8.
Status Display Process
In the status display process, two-color lighting LEDs of
DF209 (ON), DF210 (LAMP) and DF211 (TEMP) turn
ON for each kind of status shown in Table 4-8-1 by using
QF203 (M62320FP).
4-9. Various Control Bus Process
4-9.
Various Control Bus Process
In the on-screen display process, control signals are
supplied to the OSD display IC QD018 (CD0022AM),
and the OSD display IC generates character display
signals at the timing determined by VD, HD and clock
supplied to the IC separately.
In addition, control signals are fed to the video, panel,
drive system circuits through I
4-4
2
C bus.