Cypress Semiconductor CY7C185 Specificatieblad - Pagina 6
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Switching Waveforms
Write Cycle No. 2 (CE Controlled)
ADDRESS
CE
1
CE
2
WE
DATA I/O
Write Cycle No. 3 (WE Controlled, OE LOW)
ADDRESS
CE
1
CE
2
t
SA
WE
DATA I/O
NOTE 13
Notes:
14. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t
15. If CE
goes HIGH or CE
goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
1
2
(continued)
[12,13,14]
t
SA
t
AW
[12,13,14,15]
t
SCE1
t
SCE2
t
AW
t
HZWE
t
WC
t
SCE1
t
SCE2
t
SD
DATA
VALID
IN
t
WC
t
SD
DATA
VALID
IN
and t
.
HZWE
SD
6
CY7C185
t
HA
t
HD
C185–9
t
HA
t
HD
t
LZWE
C185–10