Bose 3-2-1GS Series II Instrukcja rozwiązywania problemów - Strona 8
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3. Communications Busses and Interface Blocks
3.1 Communications Busses
3.1.1 I
2
C Bus
There are two I
C buses: (1) the I
2
is J7000-NV which is not populated in production; (2) the I
configures the devices in audio path. The devices connecting to the I
and its protocol are listed in following table.
Reference
Vendor
Designator
Number
U4000
TEA6422
U8001
AK4112B
U9200
AK4382A
*Note: "w" bit can be either 1 or 0 depending on read/write.
3.1.2 SPI Bus
The CS98200's (U7003) built-in SPI interface is used to control two subsystems in the
console, the VFD (interface connector is J6500 [sheet 13, B8]) and the Tuner Assembly
(interface connector is J6000 [D8]). U6802 [A-C6] is the buffer between CS98200 and the
two subsystems. These subsystems must timeshare the SPI resource.
For the outbound data (data stream from CS98200 to subsystems), both subsystems have a
signal which uniquely identifies when the SPI data sent from the CS98200 is valid for them.
For the VFD module, the VFD_STROBE indicates it is the target. For the Tuner Assembly,
it is SPI_SEL (which becomes TNRBD_SEL once buffered). These signals are the key to
timesharing the SPI bus. Note the differing polarities associated with the signals.
For the outbound data (data stream from subsystems to CS98200), each subsystem inter-
acts with the CS98200 differently, as follows:
• The VFD module allows for bi-directional communication, but timeshares a single wire in
half-duplex mode to accomplish this. To receive SPI data from the VFD, the CS98200 must
therefore use the SPI configuration option which allows receiving on the same pin used for
transmission (pin 196). See the CS98200 register spec for details.
• The Tuner Assembly will use SPI in true bi-directional, full duplex mode, although the
CS9200 will be the master of all transfers. The TNRBD_DATAIN signal, which ties to the
CS98200's SPI receiver, is used for receiving. Again, see the CS98200 register spec for
SPI configuration details.
THEORY OF OPERATION
C Debug bus for software development, the connector
2
Protocol
Address
Byte
2
I
C
10011010b
AKM
00wxxxxxb
AKM
011xxxxxb
C configuration bus which
2
6-input stereo analog audio input MUX chip (ST). No
CS pin is available on this part. ADDR pin has an
internal 50K pull-up: logic high.
S/PDIF receiver. Uses the AKM_CS chip select signal
to differentiate its messages from I
address separates its messages from those for the
mix-down DAC. "w" is the write bit. The 8 data bits of
the 16-bit protocol are driven by the AK4112B when w
is 0.
Stereo DAC for the CS98200 Mix-down path. Uses
the AKM_CS chip select signal to differentiate its
2
messages from I
C. The AKM address separates its
messages from those for the S/PDIF receiver.
8
C configuration bus
2
Description
2
C. The AKM