Dell N1548 Instrukcja aktualizacji oprogramowania sprzętowego - Strona 15

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Dell N1548 Instrukcja aktualizacji oprogramowania sprzętowego
Upgrade Dell EMC Networking N1500 Series Switches
The system is going down NOW!
Sent SIGTERM to all processes
Sent SIGKILL to all processes
Requesting system reboot
U-Boot 2012.10-00244-g9552470cd8 (Feb 20 2018 - 15:54:29)
I2C:
ready
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x05400000
IPROC_XGPLL_STATUS: 0x80000490
DCO code: 73
=========================================
DEV ID = 0xdb56
SKU ID = 0xb150
DDR type: DDR3
MEMC 0 DDR speed = 667MHz
PHY revision version: 0x00024006
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy ReadyDone.
DDR phy calibration passed
Programming controller register
ddr_init2: MemC initialization complete
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DeepSleep wakeup: ddr init bypassed 3
DDR Interface Ready
CPLD: addr=0x21, rev=10
Board: L2 48 Port Copper POE+ Switch, X01
DRAM:
1 GiB
NAND:
Micron MT29F1G08ABADA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:
chipsize 128 MiB
In:
serial
Out:
serial
Err:
serial
arm_clk=1000MHz, axi_clk=400MHz, apb_clk=100MHz, arm_periph_clk=500MHz
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