Dell Networking N3024F Aktualizacja oprogramowania sprzętowego - Strona 12
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Upgrade Procedure Dell™ Networking
N2024/N2024P/N2048/N2048P/N3024/N3024F/N3024P/N3048/N3048P
Switches
<184> Feb 21 04:37:14 172.25.150.239-2 UNITMGR[130491884]: unitmgr.c(6343) 1192 %% Reset
initiated on unit 2, reason: User Request
Reference platform resetting ...
starting pid 85
syncing filesystems....This may take a few moments
Rebooting system!
The system is going down NOW!
Sent SIGTERM to all processes
Sent SIGKILL to all processes
Requesting system reboot
U-Boot SPL 2012.10-00076-g49fadd9 (Jan 23 2014 - 17:59:05)
BENCH SCREENING TEST1
=========================================
IPROC_XGPLL_CTRL_3: 0x15400000
IPROC_XGPLL_STATUS: 0x800002b0
DCO code: 43
PASS
=========================================
HWRev: 0x23 Force-AVS: 0x0 VOUT Init: 0x5f VOUT Set: 0x64 Steps: 5 Fail: 0
DEV ID= 0000dc14
SKU ID = 0x0
DDR type: DDR3
MEMC 0 DDR speed = 800MHz
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready
Programming controller register
ddr_init2: Calling soc_ddr40_shmoo_ctl
Validate Shmoo parameters stored in flash ..... OK
Press Ctrl-C to run Shmoo ..... skipped
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DDR Tune Completed
Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:
chipsize 256 MiB
U-Boot 2012.10-00076-g49fadd9 (Jan 23 2014 - 17:59:05)
DRAM:
1 GiB
WARNING: Caches not enabled
NAND:
Micron MT29F2G08ABAEA, 128 KiB blocks, 2 KiB pages, 16B OOB, 8-bit
NAND:
chipsize 256 MiB
In:
serial
Out:
serial
Err:
serial
arm_clk=1000MHz, axi_clk=499MHz, apb_clk=124MHz, arm_periph_clk=500MHz
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