Motorola GP240 Informacje o usłudze - Strona 17
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Frequency Generation Circuit
4.1
Synthesizer
The Fractional-N Synthesizer, shown in Figure 2-4, uses a 16.8MHz crystal (Y3761) to provide a
reference for the system. The LVFractN IC (U3701) further divides this to 2.1MHz, 2.225MHz, and
2.4MHz as reference frequencies. Together with C3761, C3762, C3763, R3761, and D3761, they
build up the reference oscillator that is capable of 2.5 ppm stability over temperatures of -30 to 85°C.
A 16.8MHz signal at pin 19 of U3701 is also provided for use by ASFIC and LVZIF.
The loop filter which consist of C3721, C3722, R3721, R3722 and R3723 provides the necessary dc
steering voltage for the VCO and determines the amount of noise and spur passing through.
In achieving fast locking for the synthesizer, an internal adapt charge pump provides higher current
at pin 45 of U3701 to put the synthesizer within lock range. The required frequency is then locked by
normal mode charge pump at pin 43.
Both the normal and adapt charge pumps get their supply from the capacitive voltage multiplier
made up of C3701 to C3704 and triple diodes D3701, D3702. Two 3.3V square waves (180 degrees
out of phase) are first multiplied by four and then shifted, along with regulated 5V, to build up 13.5V
at pin 47 of U3701.
DATA (U409 PIN 100)
CLOCK (U409 PIN 1)
CSX (U409 PIN 2)
MOD IN (U404 PIN 40)
+5V (U3711 PIN 4)
5, 20, 34, 36
(U3201 PIN 5)
REFERENCE
OSCILLATOR
VOLTAGE
MULTIPLIER
7
DATA
8
CLK
9
CEX
U3701
LOW VOLTAGE
10
MODIN
FRACTIONAL-N
13, 30
SYNTHESIZER
VCC, DC5V
VDD, 3.3V
23
XTAL1
24
XTAL2
25
WARP
32
PREIN
47
VCP
VMULT2
VMULT1
14
15
PRESCALER IN
Figure 2-4 VHF Synthesizer Block Diagram.
4
LOCK
19
FREFOUT
6, 22, 23, 24
GND
43
IOUT
45
IADAPT
41
MODOUT
3
AUX4
2
AUX3
FILTERED 5V
28
SFOUT
BIAS1
40
BIAS2
AUX1
39
48
R5
DUAL
TSTRS
5V
LOCK (U409 PIN 56)
FREF (U3220 PIN 21 & U404 PIN 34)
STEERING
LINE
2-POLE
LOOP
FILTER
LO RF INJECTION
VOLTAGE
CONTROLLED
OSCILLATOR
TX RF INJECTION
(1ST STAGE OF PA)
2-7