Motorola GP320 Series Informacje o usłudze - Strona 13

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Motorola GP320 Series Informacje o usłudze

UHF Receiver

3.0
UHF Receiver
The UHF receiver consists of a front end, back end, and automatic gain control circuits. A block
diagram of the receiver is shown in Figure 2-2. Detailed descriptions of these features are contained
in the paragraphs that follow.
Antenna
Pin Diode
Antenna
Switch
RF Jack
3.1

Receiver Front-End

(Refer to Figure 2-2 and the UHF Receiver Front End schematic diagram)
The RF signal received by the antenna is applied to a low-pass filter. For UHF, the filter consists of
components L101, L102, C102, C103, and C104. The filtered RF signal is passed through the
antenna switch circuit consisting of two pin diodes (CR101 and CR102) and a pi network (C106,
L104, and C107). The signal is then applied to a varactor tuned bandpass filter.
The UHF bandpass filter consists of components L301, L302, C302, C303, C304, CR301, and
CR302. The filter is electronically tuned by DACRx from IC 404 which supplies a control voltage to
the varactor diodes (CR301 and CR302) in the filter as determined by the microprocessor
depending on the carrier frequency. Wideband operation of the filter is achieved by shifting the
bandpass filter across the band.
Varactor
RF Amp
Tuned Filter
First LO
from FGU
Control Voltage
from ASFIC
Recovered Audio
Squelch
RSSI
16.8 MHz
Reference Clock
Figure 2-2 UHF Receiver Block Diagram.
Varactor
Tuned Filter
AGC
Demodulator
IC
IF
SPI Bus
Crystal
Mixer
Filter
Synthesizer
Second
LO VCO
2-3