Motorola GP320 Series Informacje o usłudze - Strona 16
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2-6
4.0
Frequency Generation Circuit
(Refer to Figure 2-3 and the VHF Frequency Synthesizer schematic diagram)
The Frequency Generation Circuit, shown in Figure 2-3, is composed of two main ICs, the
Fractional-N synthesizer (U3701), and the VCO/Buffer IC (U3801). Designed in conjunction to
maximize compatibility, the two ICs provide many of the functions that normally would require
additional circuits. The synthesizer block diagram illustrates the interconnect and support circuit
used in the region. Refer to the schematic for the reference designator.
Voltage
Multiplier
Vmult1
Vmult2
16.8 MHz
Ref. Osc.
The synthesizer is powered by regulated 5V and 3.3V which is provided from ICs U3711 and U3201
respectively. The 5V signal is supplied to pins 13 and 30 and the 3.3V signal is applied to pins 5, 20,
34 and 36 of U3701. The synthesizer in turn generates a superfiltered 5V which powers U3801.
In addition to the VCO, the synthesizer must interface with the logic and ASFIC circuitry.
Programming for the synthesizer is accomplished through the data, clock and chip select lines (pins
7, 8 and 9) from the microprocessor, U409. A 3.3V dc signal from pin 4 indicates to the
microprocessor that the synthesizer is locked.
Transmit modulation from the ASFIC is supplied to pin10 of U3701. Internally the audio is digitized
by the Fractional-N and applied to the loop divider to provide low-port modulation. The audio runs
through an internal attenuator for modulation balancing purposes before going out at pin 41 to the
VCO.
VCP
Aux3
Synthesizer
U3701
Loop
Filter
MOD Out
Modulating
Signal
Figure 2-3 VHF Frequency Generation Unit Block Diagram
TRB
VCOBIC
Rx VCO Circuit
U3801
Tx VCO
Circuit
THEORY OF OPERATION
Rx Out
To
Mixer
Tx Out
To
PA Driver