Cypress AN49947 Nota aplikacyjna

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Application Note Abstract

This application note describes the undershoot effect in the RTC circuit of the 256K and 1M nvSRAM in 0.25μ technology. The

part numbers affected are CY14B256K/STK17T88 and CY14B101K/STK17TA8.

Introduction

Under certain noise conditions, the Real Time Clock (RTC)

circuit of CY14BXXXK/STK17TX8 can be disturbed to the

point that the oscillator circuit stops.

Undershoot in Application

The RTC devices in 0.25μ specify in the data sheet that

inputs may not undershoot by more than –0.5V. This is diffi-

cult to achieve in systems where signal fall times are fast (1

to 3 ns). As a result of these fast fall times, signal undershoot

greater than –0.5V is quite common.

Signal undershoot greater than –0.5V causes the ESD

diodes on the device inputs to conduct current. This current

travels through the substrate until it reaches collection points

(guard bands with substrate contacts). However, as this cur-

rent flows within the substrate, it adds noise to the overall

noise floor on the device.

Figure 1. Signal Undershoot

3.3V

-2V

November 06, 2008

Undershoot Effect in RTC Circuit

Associated Part Family: CY14BXXXK/STK17TX8

Effect on RTC Oscillator

The RTC oscillator circuit, which is embedded on the 256K

and 1M nvSRAM family is designed to be a very low power

circuit. To achieve this low power operation, the automatic

gain circuit of the oscillator is designed to operate on very

small currents (nano-Amperes). This makes the gain circuit

sensitive to on-chip noise, which in turn makes the RTC oscil-

lator circuit very sensitive to substrate currents caused by sig-

nal undershoot.

There have been reports of the oscillator stopping in some

customer systems. Investigation showed that these systems

all had a significant amount of undershoot. Correcting the

undershoot on the input pins corrected the problem. The

address pins A

of the RTC oscillator circuit. Undershoot on these address

pins has the greatest effect on the RTC circuit operation. It is

recommended that customers experiencing similar problems

investigate and correct undershoot issues.

Recommendation

Undershoot can be reduced by adding a Schottky diode (V

0.4V with I

and cathode on the signal line as close to the device pin as

possible. Layout must route the signals to connect to the

diode first then the pin if possible. The anode to ground

should go directly to the ground plane. The only signals that

require this treatment are A

must be used to confirm controlled undershoot as some fast

ESD Diode

edge rates may need more effective termination. It is critical

EDS DIODE

Conduction

CONDUCTION

that the voltage does not go below 0.6V as substrate currents

begin to flow.

Document # 001-49947 Revision **

of 0.25μ nvSRAM

GET FREE SAMPLES HERE

-A

and data pin DQ

are located in the area

at 100 mA) connected with the anode at ground

, A

AN49947

, and DQ

. A scope

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