Cypress Semiconductor CY7C1334H Arkusz specyfikacji - Strona 13

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Document History Page
Document Title: CY7C1334H 2-Mbit (64K x 32) Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05678
REV.
ECN NO. Issue Date
**
347357
See ECN
*A
424820
See ECN
*B
459347
See ECN
Document #: 38-05678 Rev. *B
Orig. of
Change
PCI
New Data Sheet
RXU
Changed address of Cypress Semiconductor Corporation on Page# 1 from
"3901 North First Street" to "198 Champion Court"
Changed Three-State to Tri-State.
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table.
Modified test condition from V
Replaced Package Name column with Package Diagram in the Ordering
Information table.
Replaced Package Diagram of 51-85050 from *A to *B
NXR
Converted from Preliminary to Final
Included 2.5V I/O option
Updated the Ordering Information table.
Description of Change
< V
< V
to V
DDQ
DD
DDQ
DD
CY7C1334H
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