Cypress Semiconductor MoBL CY62148BN Arkusz specyfikacji - Strona 4

Przeglądaj online lub pobierz pdf Arkusz specyfikacji dla Sprzęt komputerowy Cypress Semiconductor MoBL CY62148BN. Cypress Semiconductor MoBL CY62148BN 10 stron. 4-mbit (512k x 8) static ram

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Switching Characteristics

Parameter

READ CYCLE

t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE LOW to Data Valid
ACE
t
OE LOW to Data Valid
DOE
t
OE LOW to Low Z
LZOE
t
OE HIGH to High Z
HZOE
t
CE LOW to Low Z
LZCE
t
CE HIGH to High Z
HZCE
t
CE LOW to Power-Up
PU
t
CE HIGH to Power-Down
PD
[8]

WRITE CYCLE

t
Write Cycle Time
WC
t
CE LOW to Write End
SCE
t
Address Set-Up to Write End
AW
t
Address Hold from Write End
HA
t
Address Set-Up to Write Start
SA
t
WE Pulse Width
PWE
t
Data Set-Up to Write End
SD
t
Data Hold from Write End
HD
t
WE HIGH to Low Z
LZWE
t
WE LOW to High Z
HZWE
Notes:
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
/I
and 100-pF load capacitance.
OL
OH
6. At any given temperature and voltage condition, t
7. t
, t
, and t
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
HZOE
HZCE
HZWE
8. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of
any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Document #: 001-06517 Rev. *A
[5]
Over the Operating Range
Description
[6]
[6, 7]
[6]
[6, 7]
[6]
[6, 7]
is less than t
, t
HZCE
LZCE
HZOE
CY62148BN MoBL
62148BNLL-70
Min.
70
10
5
10
0
70
60
60
0
0
55
30
0
5
is less than t
, and t
is less than t
LZOE
HZWE
®
Max.
Unit
ns
70
ns
ns
70
ns
35
ns
ns
25
ns
ns
25
ns
ns
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
ns
for any given device.
LZWE
Page 4 of 10
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