Cypress Semiconductor Rambus XDR CY24271 Arkusz specyfikacji - Strona 2
Przeglądaj online lub pobierz pdf Arkusz specyfikacji dla Sprzęt komputerowy Cypress Semiconductor Rambus XDR CY24271. Cypress Semiconductor Rambus XDR CY24271 13 stron. Clock generator with zero sda hold time
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Pinouts
Table 2. Pin Definition - 28 Pin TSSOP
Pin No.
Name
1
VDDP
2
VSSP
3
ISET
4
VSS
5
REFCLK
6
REFCLKB
7
VDDC
8
VSSC
9
SCL
10
SDA
11
EN
12
ID0
13
ID1
14
/BYPASS
15
VDD
16
CLK3B
17
CLK3
18
VSS
19
CLK2B
20
CLK2
21
VSS
22
VDD
23
CLK1B
24
CLK1
25
VSS
26
CLK0B
27
CLK0
28
VDD
Document Number: 001-42414 Rev. **
Figure 1. Pin Diagram - 28 Pin TSSOP
1
VDDP
2
VSSP
3
ISET
4
VSS
5
REFCLK
6
REFCLKB
7
VDDC
8
VSSC
SCL
9
10
SDA
11
EN
12
ID0
13
ID1
14
/BYPASS
IO
PWR
2.5V power supply for phased lock loop (PLL)
GND
Ground
I
Set clock driver current (external resistor)
GND
Ground
I
Reference clock input (connect to clock source)
I
Complement of reference clock (connect to clock source)
PWR
2.5V power supply for core
GND
Ground
I
SMBus clock (connect to SMBus)
I
SMBus data (connect to SMBus)
I
Output Enable (CMOS signal)
I
Device ID (CMOS signal)
I
Device ID (CMOS signal)
I
REFCLK bypassing PLL (CMOS signal)
PWR
Power supply for outputs
O
Complement clock output
O
Clock output
GND
Ground
O
Complement clock output
O
Clock output
GND
Ground
PWR
Power supply for outputs
O
Complement clock output
O
Clock output
GND
Ground
O
Complement clock output
O
Clock output
PWR
Power supply for outputs
28
VDD
27
CLK0
26
CLK0B
25
VSS
24
CLK1
23
CLK1B
22
VDD
21
VSS
20
CLK2
19
CLK2B
18
VSS
17
CLK3
16
CLK3B
15
VDD
Description
CY24272
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