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HP 124708-001 1850 Manual de Introdução
Table 2 includes more details about the release dates and features of previously released Intel x86
processors, as well as processors projected to be available through 2009.
Release dates and features of Intel x86 processors
Table 2.
Code
Market
Name
name
Smithfield
Pentium
D
Irwindale
Xeon
Cranford
Xeon MP
Prescott 2M
Xeon
Potomac
Xeon MP
Paxville
Xeon MP
Paxville
Xeon MP
Presler
Pentium
D
Dempsey
Xeon
5000
Woodcrest
Xeon
5100
Conroe
Core 2
Duo
Conroe
Xeon
Tulsa
Xeon MP
Clovertown
Xeon
Tigerton
Xeon
Harpertown
Xeon
Wolfdale
Xeon
Dunnington
Xeon
Nehalem
Xeon
MT/s is an abbreviation for Mega-Transfers per second. A bus operating at 200 MHz and transferring four
*
data packets on each clock (referred to as quad-pumped) would have 800 MT/s.
** Selected chipsets only
Feature
Description
size
90nm
Two-core uni-
processor
90nm
2MB L2
version of
Nocona
90nm
Xeon MP
90nm
2MB L2
version of
Prescott
90nm
Xeon MP
90nm
Two-core Xeon
MP
90nm
Two-core
65nm
Two-core uni-
processor
65nm
Two-core
65nm
Two-core
65nm
Two-core,
uni-processor
65nm
Two-core,
uni-processor
65nm
Two-core
65nm
Four-core
65nm
Four-core
45nm
Four-core
45nm
Two-core
45nm
Six-core
45nm
Four-core Xeon
Available/
Cache
Projected
2H2005
1MB L2
per core
1Q2005
2MB L2
1Q2005
1MB L2
1Q2005
2MB L2
1Q2005
8MB L3
4Q2005
2x1MB L2
4Q2005
2x2MB L2
Q12006
2MB L2
per core
1H2006
2MB L2
per core
1H2006
4MB L2
shared
Mid-2006
4MB L2
shared
3Q2006
4MB L2
shared
4Q2006
16MB L3
4Q2006
2x4MB L2
2H2007
8MB L2
4Q2007
2x6MB L2
1Q2008
1x6MB L2
3Q2008
16MB L3
shared
1Q2009
4x256KB L2
8MB L3
shared
Max. transfer
rate
*
(MT/s)
800
800
667
800
667
800
800
>800
1066
1333
1333 MHz
1333 MHz
800 MHz
1333 MHz
1066 MHz
1333/1600
MHz**
1600 MHz*
1066 MHz
6.4 GT/s
QuickPath
Interconnect
4