Axxon LF755KB Manual de instalação - Página 18

Procurar online ou descarregar pdf Manual de instalação para Placa PCI Axxon LF755KB. Axxon LF755KB 19 páginas.

Installation Guide for Axxon LF755KB PCI Express (PCIe) 4 Port RS422 SMPTE I/O Card (Low/Standard Height Mounting)
V1.0
Using the above details, here are a few examples on using DOS DEBUG to manually configure a Port mode.
DEBUG <ENTER>
-o B404 0a ; configure Port 2 and 1 to SLAVE (DCE) mode since the MIO registers are '00'
-o B404 0b ; Port 2 to SLAVE (DCE), Port 1 to MASTER (DTE) mode since the MIO registers are '01'
-o B404 0e ; Port 2 to MASTER (DTE), Port 1 to SLAVE (DCE) mode since the MIO registers are '10'
-o B404 0f ; configure BOTH Port 2 and 1 to MASTER (DTE) mode since the MIO registers are '11'
-q ; to quit DOS debug
To configure Ports 3 & 4, search out the UARTs and index the second found UART and index to read the BAR2
value. Add 0x04 to the BAR2 value to index the MIC (MIO registers). The same weights noted above apply for
configuring Port 3 & 4, respectively.

6.2 Non-Volatile Mode Configuration

To retain the mode configuration so that this configuration may be active on a power up or PCI Reset, proceed to
save the MIO status inside the onboard EEPROMs. Each PCI UART contains its own Microwire EEPROM
(93C46). Respectively each UART can load from its own local EEPROM to program various onboard registers
including the MIO register set. Like the volatile configuration, the non-volatile setting may be configured using the
respective UART_U2 and UART_U3 devices.
The values store inside the EEPROM are of the following format:
0xB508, 0x840F, 0x0E80, 0x0000
Please note that for the 4 ports, 2 EEPROMs are used to retain the settings for the respective 4 MIO pins.
The second word defines the value to be written to at the MIC register (Local Register + offset 04) after a power
up.
Therefore for the EEPROM associated with U2 (first PCI UART),
0xB508, 0x840a, 0x0E80, 0x0000 ; Port 2 = SLAVE (DCE), Port 1 = SLAVE (DCE) mode upon a power up / PCI
Reset
0xB508, 0x840b, 0x0E80, 0x0000 ; Port 2 = SLAVE (DCE), Port 1 = MASTER (DTE) mode upon a power up / PCI
Reset
0xB508, 0x840e, 0x0E80, 0x0000 ; Port 2 = MASTER (DTE), Port 1 = SLAVE (DTE) mode upon a power up / PCI
Reset
0xB508, 0x840f, 0x0E80, 0x0000 ; Port 2 = MASTER (DTE), Port 1 = MASTER (DTE) mode upon a power up /
PCI Reset
Repeat for the EEPROM associated with U3 (second PCI UART) to configure Ports 3 & 4 with non-volatile
settings.
The software to read / write to the Microwire EEPROM is left as an exercise for the reader. Upon request
assistance can be provided from our engineering and s/w development group on the required algorithm and
associated sub-routines. Axxon has developed such code under at least DOS and Windows.
18
Axxon Computer Corporation