Sony STR-DA5000ES - Fm Stereo/fm-am Receiver Contexto técnico - Página 8
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As a primary manufacturer of Large Scale Integrated circuits (LSIs),
Sony has the freedom to pursue innovative thinking like S-Master Pro
and then express this thinking in silicon. The result is the Sony
CXD9730.
The S-Master Pro system involves eight important technologies:
• Clean Data Cycle
• Synchronous Time Accuracy Controller (S-TACT)
• Complementary Pulse Length Modulation (C-PLM)
• Pulse Height Volume Control
• DC Phase Linearizer
• Discrete Output Transistors
• Toroidal Low Pass Filter
• Two-Stage Pulse Power Supply
While digital signals are inherently resistant to noise and distortion, they
are susceptible to time-base errors called jitter. Jitter can enter the signal during
recording, playback or transfer. Precise pulse timing is crucial to the S-Master
Pro circuit. For this reason, Sony uses powerful technology to suppress jitter.
The typical method of controlling jitter is Phase Locked Loop (PLL) clock
regeneration. While the method does a good job of controlling high-frequency
jitter, Sony also required excellent control at the low frequencies. That's why
Sony engineers developed the Clean Data Cycle, the first stage of the S-Master
process. Clean Data Cycle regenerates the digital signal with time-axis accuracy
equivalent to the original A/D converter at the recording studio.
ES Receivers V3.0
Clean Data Cycle
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