Motorola GM380 Informações sobre o serviço - Página 16

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Motorola GM380 Informações sobre o serviço
2-6
4.0

VHF (136-174MHz) Frequency Synthesis

The frequency synthesizer subsystem consists of the reference oscillator (Y3261 or Y3263), the
Low Voltage Fractional-N synthesizer (LVFRAC-N, U3201), and the voltage-controlled oscillators
and buffer amplifiers (U3301, Q3301-2 and associated circuitry).
4.1

Reference Oscillator

The reference oscillator (Y3263) contains a temperature compensated crystal oscillator with a
frequency of 16.8 MHz. An analog to digital (A/D) converter internal to U3201 (LVFRAC-N) and
controlled by the microprocessor via serial interface (SRL) sets the voltage at the warp output of
U3201 (pin 25) to set the frequency of the oscillator. The output of the oscillator (U3263 pin 3) is
applied to pin 23 (XTAL1) of U3201 via R3263 and C3235.
In applications were less frequency stability is required, the oscillator inside U3201 is used along
with an external crystal Y3261, varactor diode D3261, C3261, C3262 and R3262. In this case,
Y3263, R3263, C3235 and C3251 are not used. When Y3263 is used, Y3261, D3261, C3261,
C3262 and R3262 are not used, and C3263 is increased to 0.1 uF.
4.2

Fractional-N Synthesizer

The LVFRAC-N synthesizer IC (U3201) consists of a pre-scaler, a programmable loop divider,
control divider logic, a phase detector, a charge pump, an A/D converter for low frequency digital
modulation, a balance attenuator to balance the high frequency analog modulation and low
frequency digital modulation, a 13V positive voltage multiplier, a serial interface for control, and
finally a super filter for the regulated 5 volts.
DATA (U0101 PIN 100)
CLOCK (U0101 PIN 1)
CSX (U0101 PIN 2)
MOD IN (U0221 PIN 40)
+5V (U3211 PIN 1)
5, 20, 34, 36
+5V (U3211 PIN 1)
REFERENCE
OSCILLATOR
VOLTAGE
MULTIPLIER
7
DATA
8
CLK
9
CEX
10
MODIN
13, 30
VCC, DC5V
VDD, DC5V
23
XTAL1
U3201
LOW VOLTAGE
24
XTAL2
FRACTIONAL-N
25
SYNTHESIZER
WARP
32
PREIN
47
VCP
VMULT2
VMULT1
14
15
PRESCALER IN
Figure 2-1 VHF Synthesizer Block Diagram
4
LOCK
19
FREFOUT
6, 22, 33, 44
GND
43
IOUT
45
IADAPT
41
MODOUT
3
AUX4
1
AUX2
TRB
2
AUX3
FILTERED 5V
28
SFOUT
BIAS1
40
BIAS2
AUX1
39
48
BW SELECT
THEORY OF OPERATION
LOCK (U0101 PIN 56)
FREF (U0221 PIN 34)
STEERING
LINE
2-POLE
LOOP
FILTER
LO RF INJECTION
VOLTAGE
CONTROLLED
OSCILLATOR
TX RF INJECTION
(1ST STAGE OF PA)
TO IF SECTION