Clarion PN-2302N-A Manual de serviço - Página 5

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Clarion PN-2302N-A Manual de serviço
pin 49 : SW 2_
: IN : Eject arm end detection signal input.
Negative logic.
pin 50 : SW 4_
: IN : Datum point detection signal input for
the wedge. Negative logic.
pin 51 : PT 2
: IN : Wedge position count photo coupler in-
put.
pin 52 : PT 7
: IN : Loading end detection signal input.
pin 53 : PT 6
: IN : Loading end detection signal input.
pin 54 : PT 5
: IN : Loading detection signal input.
pin 55 : DIMMER
: O : LED dimmer output.
pin 56 : SW 5_
: IN : "L"= Drive unit is in front end.
pin 57 : PT 3
: IN : "H"= Drive unit is play position.
pin 58 : PT 4_
: IN : Loading start detection signal input.
Negative logic.
pin 59 : SW 6_
: IN : "L"= Drive unit is in deep.
pin 60 : SW 8_
: IN : "L"= Disc release.
pin 61 : PT 8_
: IN : Stock arm full swing detection signal
input.(Disc inserted to holder)
pin 62 : NU
: - : Not in use.
pin 63 : TCLK
: O : Not in use.
pin 64 : TEST 1_
: IN : Not in use.
pin 65 : TEST 2_
: IN : Not in use.
pin 66 : TEST 3_
: IN : Not in use.
pin 67 : TEST 4_
: IN : Not in use.
pin 68 : THRU_
: IN : Two times speed play back without
*SPMC.
pin 69 : EEPROM DI
: IN : Serial data input from the EEPROM.
pin 70 : EEPROM DO
: O : Serial data output to the EEPROM.
pin 71 : EEPROM CK
: O : Clock pulse output to the EEPROM.
pin 72 : EEPROM CE
: O : Chip select output to the EEPROM.
pin 73 : X RST 1_
: O : Reset signal output to the CD IC. Neg-
ative logic.
pin 74 : CLOCK
: O : Clock pulse output to the CD IC and
*SPMC.
pin 75 : X LAT_
: O : Latch pulse output to the CD IC. Neg-
ative logic.
pin 76 : DATA
: O : Serial data output to the CD IC and
*SPMC.
pin 77 : SCLK
: O : Clock pulse output to the CD IC, to
read the status data.
pin 78 : SENS
: IN : Serial status data input from the CD
IC.
pin 79 : EMPH 1
: O : De-emphasis control signal output to
the CD IC. "H"= De-emphasis ON.
pin 80 : NU
: - : Connect to ground.
pin 81 : VPP
: - : Connect to ground.
pin 82 : X 2
: - : Crystal connection.
pin 83 : X 1
: - : Crystal connection.
pin 84 : VDD
: - : Positive supply voltage.
pin 85 : XT 2
: - : Not in use.
pin 86 : XT 2
: - : Not in use.
pin 87 : RESET_
: IN : Reset input.
pin 88 : SCOR
: IN : Inputs a high signal from CD IC when
either subcode sync S0 or S1 is de-
tected.
pin 89 : NU
: - : Not in use.
pin 90 : ILL PIN
: IN : Illumination control signal input.
pin 91 : GRSCOR
: IN : SCOR input from *SPMC, for crystal
precision that frame jitter margin is ab-
sorbed.
pin 92 : ACC DET_
: IN : ACC detection terminal. "L"= ACC ON.
pin 93 : M WR EN
: IN : Play back data time information read
enable signal input from *SPMC.
pin 94 : M RD EN
: IN : Play back data time information write
enable signal input from *SPMC.
pin 95 : A VDD
: - : Positive supply voltage for internal
ADC.
pin 96 : A Vref 0
: - : Reference voltage for internal ADC.
pin 97 : ILL
: IN : Dimmer input voltage detection termi-
nal.
pin 98 : X RST 2_
: O : Reset signal output to *SPMC. Nega-
tive logic.
pin 99 : GRSRST
: O : GRRST pulse output to *SPMC. Nega-
tive logic.
pin100 : X Q OK_
: O : *SPMC data settlement direction output
terminal.<ICtablename>
*SPMC : Shock Protection Memory Controller
CXD2512AR
051-6346-00
Shock Protection Memory Controller for CD Players
1. Feature
: This IC is designed for use with the external buffer
RAM consisting of either one, two, or four 4M DRAMs
or one 16M DRAM.
2. Block Diagram
3. Terminal Description
pin 1 : WR F CK
pin 2 : D form IN
pin 3 : C4M
pin 4 : X R Over I
pin 5 : Read Fr CK
pin 6 : GT OPEN
pin 7 : B CK IN
pin 8 : DATA IN
pin 9 : LR CK IN
pin 10 : VSS
pin 11 : Word CK IN
pin 12 : TEST
pin 13 : XTAL OUT
pin 14 : XTAL IN
pin 15 : (BC)
pin 16 : (TCK)
pin 17 : (TDI)
pin 18 : (TENAI)
pin 19 : (TDO)
pin 20 : (VST)
pin 21 : B CK OUT
pin 22 : DATA OUT
pin 23 : LR CK OUT
pin 24 : D form OUT
pin 25 : A 3
- 5 -
: IN : Write frame clock input.
: IN : Digital audio interface format signal in-
put.
: IN : 4.2336MHz input for GR SCOR gener-
ation.
: IN : RAM overflow input from DSP.
: IN : Read frame clock input from DSP.
: IN : Frame sync protection gate open signal
input from DSP.
: IN : Bit clock input.
: IN : PCM data input.
: IN : Left/Right clock input.
: - : Ground.
: IN : Word clock input.
: IN : Not in use.
: O : 16.9344MHz crystal oscillator circuit
output.
: IN : 16.9344MHz crystal oscillator circuit in-
put.
: - : Not in use.
: - : Not in use.
: - : Not in use.
: - : Not in use.
: - : Not in use.
: - : Not in use.
: O : Bit clock output.
: O : PCM data output.
: O : Left/Right clock input.
: O : Digital audio interface format signal
output.
: O : Address output to the external DRAM.
PN-2302M/N