Yamaha DSP-AX757SE Manual de serviço - Página 28
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RX-V757/DSP-AX757/DSP-AX757SE
RX-V657/HTR-5860
IC2 : LC89057W-VF4D-E (DSP P.C.B.)
Digital Audio Interface Transceiver
No.
Name
I/O
1
RXOUT
2
RX0
3
RX1
4
RX2
5
RX3
6
DGND
7
DVDD
8
RX4
9
RX5/VI
10
RX6/UI
11
DVDD
12
DGND
13
LPF
14
ACDD
15
AGND
16
RMCK
17
RBCK
O/I
18
DGND
19
DVDD
20
RLRCK
O/I
21
RDATA
22
SBCK
23
SLRCK
24
SDIN
25
DGND
26
DVDD
27
XMCK
28
XOUT
29
XIN
30
DVDD
31
DGND
32
EMPHA/UO
I/O
33
AUDIO/VO
I/O
34
CKST
I/O
35
INT
I/O
36
RERR
37
DO
38
DI
39
CE
40
CL
41
XMODE
42
DGND
43
DVDD
44
TMCK/PIO0
I/O
45
TMCK/PIO1
I/O
46
TLRCK/PIO2
I/O
47
TLRCK/PIO3
I/O
48
TXO/PIOEN
O/I
1) Input/output I or O = -0.3 to 3.6V, I
2) Pins 32 and 33 are latch address setting input pins when pin 41 = "L".
3) Pin 34 is a demodulation function master or slave setting input pin when pin 41 = "L".
4) Pin 35 is a modulation function or general-purpose I/O function switch setting input pin when pin 41 = "L".
5) Perform ON/OFF for all power supplies with the same timing as a latch-up countermeasure.
54
Function
O
Input bi-phase selection data output pin
I
TTL-compatible digital data input pin
5
I
Coaxial-compatible digital data input pin with built-in amplifier
I
TTL-compatible digital data input pin
5
I
TTL-compatible digital data input pin
5
Digital GND
Digital power supply
I
TTL-compatible digital data input pin
5
I
TTL-compatible digital data / Validity flag input pin for modulation
5
I
TTL-compatible digital data / User data input pin for modulation
5
PLL digital power supply
PLL digital GND
O
PLL loop filter connection pin
PLL analog power supply
PLL analog GND
O
R system clock output pin (256fs, 512fs, XIN, VCO)
R bit clock input/output pin
Digital GND
Digital power supply
R LR clock input/output pin (fs)
O
Serial audio data input pin
O
S bit clock output pin (32fs, 64fs, 128fs)
O
S LR clock output pin (fs/s, fs, 2fs)
I
Serial audio data input pin
5
Digital GND
Digital power supply
O
Oscillation amplifier output pin
O
Crystal resonator connection output pin
I
Crystal resonator connection, external supply clock input pin (24.576 MHz or 12.288 MHz)
Digital power supply
Digital GND
Emphasis information / U data output / Chip address setting pin
Non-PCM output / V flag output / Chip address setting pin
Clock switch transition period signal / Demodulation master or slave function switch pin
Microcontroller interrupt output / Modulation or general-purpose I/O switch pin
O
PLL clock error, data error flag output
O
Microcontroller I/F read data output pin (3-state)
I
Microcontroller I/F write data input pin
5
I
Microcontroller I/F chip enable input pin
5
I
Microcontroller I/F clock input pin
5
I
System reset input pin
5
Digital GND
Digital power supply
Modulation 256fs system clock input / General-purpose I/O input/output pin
Modulation 64fs bit clock input / General-purpose I/O input/output pin
Modulation fs clock input / General-purpose I/O input/output pin
Modulation serial audio data input / General-purpose I/O input/output pin
Modulation data output / General-purpose I/O enable input pin
= -0.3 to 5.5V
5