Yamaha DP-U50 Manual de serviço - Página 22

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Yamaha DP-U50 Manual de serviço
DP-U50
IC436 : HD6417014F28
16 bit µ-COM (CPU)
No.
Port
57
D11
58
D10
59
D9
60
D8
61
VSS
62
D7
63
D6
64
D5
65
VCC
66
D4
67
D3
68
D2
69
D1
70
D0
71
VSS
72
XTAL
73
MD3
74
EXTAL
75
MD2
76
NMI
77
VCC
78
MD1
79
MD0
80
PLLVCC
81
PLLCAP
82
PLLVSS
83
PA15/CK
84
/RES
85
PE0/TIOC0A//DREQ0
86
PE1/TIOC0B//DACK0
87
PE2/TIOC0C//DREQ1
88
PE3/TIOC0D//DACK1
89
PE4/TIOC1A
90
VSS
91
PF0/AN0
92
PF1/AN1
93
PF2/AN2
94
PF3/AN3
95
PF4/AN4
96
PF5/AN5
97
AVSS
98
PF6/AN6
99
PF7/AN7
100
AVCC
101
VSS
102
PE5/TIOC1B
103
VCC
104
PE6/TIOC2A
105
PE7/TIOC2B
106
PE8
107
PE9
108
PE10
109
VSS
110
PE11
111
PE12
112
PE13
21
Name
I/O
Function
D11
I/O
Data bus
D10
I/O
Data bus
D9
I/O
Data bus
D8
I/O
Data bus
VSS
GND
D7
I/O
Data bus
D6
I/O
Data bus
D5
I/O
Data bus
VCC
+5V
D4
I/O
Data bus
D3
I/O
Data bus
D2
I/O
Data bus
D1
I/O
Data bus
D0
I/O
Data bus
VSS
GND
XTAL
I
Connect to crystal (7MHz)
MD3
I
Mode setup input (+5V)
EXTAL
I
Connect to crystal (7MHz)
MD2
I
Mode setup input (GND)
NMI
Not used (Pull up)
VCC
+5V
MD1
I
Mode setup input (GND)
MD0
I
Mode setup input (+5V)
PLLVCC
I
Power input of internal PLL oscillator (+5V)
PLLCAP
I
Capacitor terminal of internal PLL oscillator
PLLVSS
I
GND of internal PLL oscillator (GND)
CPUCLK
O
CPU clock output
RST
I
Power on reset input
REM
I
Remote control input
E_A
I
Encoder detection (Volume)
E_B
I
Encoder detection (Volume)
RYDY
I
ROM Ready input
POW
O
Power relay control
VSS
GND
KEY0
I
Key input (AD)
PS
I
Protection PS
PRT_DC
I
Amp protection (DC) (Active-L) (Not used)
PRT_I
I
Amp protection (current) (Active-H) (Not used)
TYPE
I
Model detection
DEST
I
Market detection
AVSS
I
GND (analog)
DC_ON
I
DC level detection of power supply
P_SW
I
ON/OFF detection of power switch
AVCC
+5V (analog)
VSS
GND
USBRST
O
Reset output for USB, Gate Array
VCC
+5V
SUSPN
I
Suspend input from USB
RWUPN
O
Remote Wake-Up output to USB
SW-MUTE
O
Subwoofer mute (ON: L)
A-MUTE
O
Total mute (ON: L)
SFMUTE
O
DAC soft mute (ON: H)
VSS
GND
MIX_MUTE
O
DAC MIX signal path mute (ON: H)
HP
I
Headphone detection
DMVDD
O
Enable output to Gate Array (ON: H)