Cypress Semiconductor CY7C1339G Ficha de especificações - Página 13
Procurar online ou descarregar pdf Ficha de especificações para Hardware informático Cypress Semiconductor CY7C1339G. Cypress Semiconductor CY7C1339G 18 páginas. Cypress 4-mbit (128k x 32) pipelined sync sram specification sheet
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Switching Waveforms
[18, 20, 21]
Read/Write Cycle Timing
t CYC
CLK
t CH
t CL
t ADS
t ADH
ADSP
ADSC
t AS
t AH
ADDRESS
A1
A2
BWE,
BW[A:D]
t CES
t CEH
CE
ADV
OE
Data In (D)
High-Z
t CLZ
Data Out (Q)
Q(A1)
High-Z
Back-to-Back READs
Notes:
20. The data bus (Q) remains in high-Z following a WRITE cycle, unless a new read access is initiated by ADSP or ADSC.
21. GW is HIGH.
Document #: 38-05520 Rev. *F
(continued)
A3
A4
t WES
t WEH
t DS
t DH
t CO
D(A3)
t OEHZ
Q(A2)
Single WRITE
DON'T CARE
t OELZ
Q(A4)
Q(A4+1)
BURST READ
UNDEFINED
CY7C1339G
A5
A6
D(A5)
D(A6)
Q(A4+2)
Q(A4+3)
Back-to-Back
WRITEs
Page 13 of 18
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