Cypress Semiconductor STK12C68-5 Ficha de especificações

Procurar online ou descarregar pdf Ficha de especificações para Hardware informático Cypress Semiconductor STK12C68-5. Cypress Semiconductor STK12C68-5 19 páginas. 64 kbit (8k x 8) autostore nvsram

Cypress Semiconductor STK12C68-5 Ficha de especificações
Features
35 ns and 55 ns access times
Hands off automatic STORE on power down with external
68 µF capacitor
STORE to QuantumTrap™ nonvolatile elements is initiated
by software, hardware, or AutoStore™ on power down
RECALL to SRAM initiated by software or power up
Unlimited Read, Write, and Recall cycles
1,000,000 STORE cycles to QuantumTrap
100 year data retention to QuantumTrap
Single 5V+10% operation
Military temperature
28-pin (300mil) CDIP and 28-pad LCC packages
Logic Block Diagram
Cypress Semiconductor Corporation
Document Number: 001-51026 Rev. **
64 Kbit (8K x 8) AutoStore nvSRAM
Quantum Trap
A
5
A
6
A
7
STATIC RAM
A
8
ARRAY
128 X 512
A
9
A
11
A
12
DQ
COLUMN I/O
0
DQ
1
COLUMN DEC
DQ
2
DQ
3
DQ
4
DQ
A
A
A
A
A
0
1
4
5
2
3
DQ
6
DQ
7
198 Champion Court
STK12C68-5 (SMD5962-94599)

Functional Description

The Cypress STK12C68-5 is a fast static RAM with a nonvol-
atile element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world's most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down.
On power up, data is restored to the SRAM (the RECALL
operation) from the nonvolatile memory. Both the STORE and
RECALL operations are also available under software control.
A hardware STORE is initiated with the HSB pin.
V
V
CC
CAP
128 X 512
POWER
STORE
CONTROL
RECALL
STORE/
RECALL
CONTROL
SOFTWARE
A
10
,
San Jose
CA 95134-1709
HSB
-
A
A
DETECT
0
12
OE
CE
WE
408-943-2600
Revised March 02, 2009
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