EG&G ORTEC 535 Manual de operação e serviço - Página 7

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INSTALLATION

3.1.

CONNECTION TO DETECTOR

Connect the output from the detector or preamplifier to

the Input BNC on the 535 with 50 O coaxial cable. This

cable should be as short as practical to minimize the

physical distance through which the detector output-

current pulse has to pass. The amount of noise that will

be added to the signal increases with cable length.

An input signal to the 535 can be of either polarity (e.g.,

it can originate from the anode or any dynode in a photo-

multiplier tube circuit). AC-coupiing must be used to pre

vent any high voltage from the detector being applied

directly to the 535 input. An input-protection circuit is

included which allows excellent (typically <5 ns) over

load recovery. The output signal from the 535 will have

the same polarity as the input and will be amplified by a

factor of 5-10. The linear output range is ±5 V into a 50 n

load.

the 535 through 50 O cable terminated by a 50 Q load.

If the driving instrujnent does not have an input imped

ance of 50 n, an external terminating resistor should be

added to prevent pulse reflections.

3.3.

CASCADING

When an amplification greater than a factor of 10 is de

sired, the input signal can be cascaded through additional

sections of the 535. Each section provides the nominal

maximum gain of 10. Cascading the signal through all

four sections will provide an amplification factor of about

10,000.

When cascading sections of the 535, care must be taken to

ensure proper adjustment of the DC offset controls to

ensure operation within the linear range of ±5 V.

3.2.

CONNECTION OF OUTPUT

The output impedance of the 535 is nominally 1 O. Any

counter, amplifier, or timing instrument can be driven by

OPERATING INSTRUCTIONS

Three operator controls (DC, Gain, and BDW) are pro

vided on the 535. The DC adjustment permits the setting

of the dc-output offset to zero volts. [The input offset

voltage is adjusted by an internal potentiometer mounted

on a printed wiring board (PWB).] The Gain potentiom

eter adjusts voltage gain continuously from 5 to 10. The

BDW (bandwidth) sets the rise time or overshoot appro

priate for the experiment. The tilt is adjusted by an internal

potentiometer mounted on the PWB.

CIRCUIT DESCRIPTION

The circuit of the 535 Quad Fast Amplifier is shown in

schematic 635120 at the back of this manual. Refer to

this schematic for the following circuit description. Since

ail four channels of the 535 are identical, only channel 1

will be discussed.

Diodes D1 and D2 form a bridge current limiter which is

voltage-clamped by 01 and Q2 to limit the input swing to

'K. W. Renner, M. O. Bedwell, and J. F. Pierce, "A Wideband

Direct Coupled Amplifier Utilizing a Fast/Slow Loop Concept,"

IEEE Trans. Nucl. Sci., NS-28(1), 584.

^K. W. Renner, 4 Direct Coupled Wideband Hybridized Amplifier

with a Fast/Slow Loop, M.A. Thesis, University of Tennessee,

Knoxville, December 1980.

the hybrid fast amplifier, A1. This input protection cir

cuitry ensures that no harsh overload signals will reach

A1, thus offering excellent overload recovery time.

Voltage gain is varied by adjusting resistor R2. The input

offset voltage is adjusted by resistor R4 which controls

the current in the current limiting bridge.

The fast amplifier hybrid uses a fast/slow loop tech

nique.''^ The input signal enters the slow loop on pin 14

of A1 and is ac-coupled through C2 and C3 to the fast loop

input on pin 1 of A1. The slow-loop gain is adjusted by

resistor R9. The adjustment is factory-set so that the fast

signal gain equals the do gain. The fast amplifier band

width is controlled by resistorRIB. The slow loop controls

the dc-output offset which is adjusted by R12.