Acer AL2032W Руководство по эксплуатации - Страница 36

Просмотреть онлайн или скачать pdf Руководство по эксплуатации для Монитор Acer AL2032W. Acer AL2032W 39 страниц. Acer lcd monitor user's guide
Также для Acer AL2032W: Руководство пользователя (10 страниц), Руководство по эксплуатации (39 страниц)

Печатать страницу
SCHEMATIC DIAGRAM
Main Board Circuit
+1.8V_CORE
V
5
/ 6
/ 6
/ 2
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
V
5
F
/ 6
F
F
F
/ 6
F
F
/ 6
F
F
F
/ 6
/ 6
/ 2
u
u
u
/ 6
u
u
u
u
u
u
F
F
. 1
. 1
. 1
. 1
. 1
F
. 1
. 1
8 2 2
F
7
. 1
u
0
1
F
5
u
7
6
F
3
6
F
u
5
u
4
5
4
u
3
. 1
3
0
3
u
5
4
0
4
. 1
0
0
0
0
u
0
5
. 1
0
0
7 2 2
1
1
1
. 1
1
1
1
. 1
1
1
C
5
8
4
9
. 1
2
4
0
0
0
5
C
1
C
C
3
C
1
3
C
C
2
0
C
C
0
0
1
1
1
1
C
C
C
C
C
C
C
GND
+2.5V_DDR
/ 6
/ 6
/ 6
/ 6
V
V
/ 6
5
5
/ 6
/ 6
F
/ 6
F
/ 6
/ 6
F
F
/ 6
/ 6
/ 2
/ 2
u
u
/ 6
/ 6
/ 6
u
u
F
F
F
. 1
F
. 1
F
F
F
. 1
F
9
0
8
. 1
u
F
2
F
F
u
u
u
u
u
u
F
F
u
2
2
2
. 1
4
u
u
4
. 1
3
. 1
0
. 1
0
. 1
0
. 1
. 1
0
u
u
0
u
0
. 1
1
1
1
9
6
1
7 2 2
5 2 2
2
5
2
3
7
. 1
6
. 1
4
0
8
. 1
C
0
0
2
0
1
0
1
0
4
1
2
0
1
C
C
0
1
C
2
2
1
3
1
1
1
0
0
C
0
1
1
1
1
C
C
C
C
C
C
C
C
C
C
C
C
GND
+3.3V_I/O_MALIBU
/ 6
/ 6
F
F
/ 6
/ 6
/ 6
/ 6
u
/ 6
/ 6
u
/ 6
/ 6
V
F
. 1
F
. 1
V
F
F
F
F
5
/ 6
u
5
F
F
u
u
u
u
u
/ 2
4 0
3 0
/ 2
u
u
F
3
. 1
. 1
. 1
. 1
. 1
. 1
4
. 1
. 1
u
7
3
6
F
5
F
7
0
7 0
5 0
0 0
6
6
. 1
1
1
1 0
8 0
1
u
5
u
0
6
0
2
4
1
1
6
2
2
1
7
C
C
1
5
5
C
C
0
1
1
C
2
2
C
1
1
1
1
C
C
C
C
C
C
C
GND
+1.8V_DVI
+3.3V_DVI
/ 6
/ 6
F
/ 6
/ 6
/ 6
/ 6
/ 6
F
u
V
/ 6
/ 6
u
. 1
F
F
5
F
F
1
F
3
. 1
F
F
u
u
u
/ 2
u
u
6
4
u
u
0
6
. 1
. 1
7
. 1
0
2
. 1
1
9
. 1
2
1
. 1
. 1
5
4
F
9
5
6
5
0
5
5
0
0
C
0
0
5
u
C
4
5
0
1
1
1
1
1
0
2
1
1
C
C
C
C
C
C
2
TXD
C
C
GND
GND
RXD
+3.3V_PLL
+3.3V_PLL
22pF/6
C67
C68
22pF/6
X1
14.318MHz
Route (VIN1/ADC_IN1, ADC1_RETURN) and
(VIN2/ADC_IN2, ADC2_RETURN) as differential
tracks close to each other and ground the
return track of each pair very close to the
Malibu D12 ball and ground pin
Optional Filter Caps in between a pair on LBADC differential tracks close
to the Malibu chip
CN3
+5V
1
TXD
2
RXD
3
4
4606-04-04P-R/NS
GND
MSTR_SCL
MSTR_SDA
FSVREF
+1.8V_ADC
C38
C39
C63
C62
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
GND
+3.3V_ADC
GND
C169
C70
C168
C175
C171
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
+3.3V_PLL
GND
C77
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
F
F
F
F
F
F
u
F
u
u
u
u
22uF/25V
u
4
. 1
u
5
. 1
. 1
0
. 1
. 1
7
. 1
7
6
. 1
8
6
6
0
0
7
7
1
7
7
1
0
6
0
25V
0
0
0
1
1
1
1
1
C
C
C
C
C
C
C
GND
+3.3V_LVDSA
+3.3V_LVDS
6
OCMDATA[0..7]
C47
C44
C131
C132
C133
0.1uF/6
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
25V
+3.3V_LVDSB
GND
GND
C144
C142
C148
C52
0.1uF/6
0.1uF/6
0.1uF/6
22uF/25V
25V
GND
+5V
+3.3V_ADC
R150
R151
10K/6
10K/6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
K
/ 6
K
K
3
3
K
K
3
K
K
3
4 3
3
3
LED_G
R152
4K7/6
2
Q12
3
3
9 3
0 3
5 3
7 3
6 3
8 3
5
5
6
MMBT3904L
5
5
1
5
5
1
1
1
1
1
1
R
R
R
R
R
R
R
3
MENU
R153 4K7/6
LED_R
2
Q13
1
SEL
MMBT3904L
PWR
DOWN
UP
1
RIGHT
LEFT
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
F
F
F
F
F
F
F
u
u
u
u
u
u
u
3
. 1
4
. 1
7
. 1
. 1
5
. 1
6
. 1
8
. 1
8
9
9
9
0
0
9
0
9
9
0
1
1
0
9
0
1
0
1
1
1
C
C
C
C
C
C
C
Junction from A
change to B
+3.3V_LBADC
+3.3V_I/O_MALIBU
+1.8V_CORE
0
4
6
8
1
7
7
1
6
6
7
1
0
6
1
6
0
1
2
4
4
3
3
1
3
7
3
4
1
1
1
1
1
1
1
1
1
1
1
C
C
C
C
2
A
B
4
1
2
1
2
1
2
K
K
T
U
U
K
U
U
L
T
T
L
K
K
A
A
A
A
D
A
W
A
Y
C
H
D
D
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
L
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
3
. 5
L
- 3
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 2
_ D
D
E
E
E
E
E
E
E
E
E
E
E
E
E
S
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
8
C
R
R
R
R
R
R
R
R
R
R
R
R
R
F
1
A
O
O
O
O
O
O
O
O
O
O
O
O
O
A
B
N4
L
C
C
C
C
C
C
C
C
C
C
C
C
C
D
R170 0/6/NC
DVI_SCL
N3
D
R171 0/6/NC
V
A8
DVI_SDA
RX0+
B8
RX0+
RX0-
A9
RX0-
RX1+
B9
RX1+
RX1-
A10
RX1-
RX2+
B10
RX2+
RX2-
A6
RX2-
RXC+
B6
RXC+
D5
RXC-
RXC-
NO_CONNECT
C5
B11
NO_CONNECT
+3.3V_DVI
R54
249R/6 1%
REXT
B1
3
BLUE-
B2
BLUE-
3
BLUE+
R131 0/6
C1
BLUE+
GREEN-
3
GREEN-
C2
R132 0/6
GREEN+
3
GREEN+
D1
RED-
3
RED-
D2
3
RED+
RED+
C3
3
SOG
A1
SOG
N2
NO_CONNECT
3
VGA_SCL
N1
VGA_SCL
3
VGA_SDA
L4
VGA_SDA
3
AHS
L3
AHSYNC
R4
AVSYNC
3
AVS
EXTCLK
G4
XTAL
XTAL
G3
TCLK
TCLK
F1
NO_CONNECT
K3
K2
NO_CONNECT
R77
3K3/6
ACS_RSET_HD
ACS_RSET_HD
C19
B19
VRED0
GND
A19
VRED1
D18
VRED2
C18
VRED3
VRED4
B18
VRED5
A18
VRED6
C17
VRED7
R78
A23
10K/6
C22
VGRN0
B22
VGRN1
A22
VGRN2
GND
D21
VGRN3
C21
VGRN4
B21
VGRN5
A21
VGRN6
VGRN7
B25
A25
VBLU0
D24
VBLU1
C24
VBLU2
B24
VBLU3
VBLU4
A24
VBLU5
C23
VBLU6
B23
VBLU7
A20
R37
VCLK
B20
10K/6
VODD
C20
D19
VVS
D20
VHS_CSYNC
VDV
GND
B17
VCLAMP
C26
7
PWM0
PWM0
PWM0
C25
T105
PWM1
PWM1
7
PWM1
D26
T106
PWM2
D25
OCM_TIMER1
A12
GND
B12
LBADC_IN3
SCART_FUNC
C12
LBADC_IN2
SCART_RGB_CON
LBADC_IN1
D12
GND
LBADC_RETURN
C16
Y0
SVDATA0
B16
Y1
SVDATA1
A16
Y2
SVDATA2
D15
Y3
SVDATA3
C15
Y4
SVDATA4
B15
T101
Y5
SVDATA5
A15
Y6
SVDATA6
D14
Y7
SVDATA7
T103
A17
T102
A14
SVDV
SVODD
B14
T104
SVVSYNC
C14
SVHSYNC
D16
LLC_VPC
SVCLK
M1
OCM_UDO
M2
OCM_UDI
K1
/RESET
/RESET
M4
IR1
IR1
M3
IR0
IR0
GND
P4
MSTR_SCL
MSTR_SCL
MSTR_SDA
P3
MSTR_SDA
R3
6
/OCM_WE
/OCM_WE
R2
/OCM_WE
/OCM_RE
6
/OCM_RE
R1
/OCM_RE
T107
/OCM_CS
L1
/ROM_CS
6
/ROM_CS
T108
L2
/OCM_INT2
T109
/OCM_INT1
P2
T110
/OCM_CS2
P1
T111
/OCM_CS1
T4
/OCM_CS0
6
OCMADDR[0..19]
OCMADDR19
T3
OCMADDR19
OCMADDR18
T2
OCMADDR18
OCMADDR17
T1
OCMADDR17
OCMADDR16
U4
OCMADDR16
OCMADDR15
U3
OCMADDR15
OCMADDR14
U2
OCMADDR14
OCMADDR13
U1
OCMADDR13
OCMADDR12
V4
OCMADDR12
OCMADDR11
V3
OCMADDR11
OCMADDR10
V2
OCMADDR10
OCMADDR9
V1
OCMADDR9
OCMADDR8
W3
OCMADDR8
OCMADDR7
W2
OCMADDR7
OCMADDR6
W1
Y3
OCMADDR6
OCMADDR5
OCMADDR5
Y2
OCMADDR4
OCMADDR4
Y1
OCMADDR3
OCMADDR3
OCMADDR2
AA3
OCMADDR2
OCMADDR1
AA2
OCMADDR1
OCMADDR0
AA1
OCMADDR0
AB3
KEY1
AB2
OCMDATA15
KEY2
OCMDATA14
AB1
KEY3
OCMDATA13
AC3
RIGHT
OCMDATA12
T112
AC2
LEFT
OCMDATA11
AC1
T113
OCMDATA10
AD1
T114
OCMDATA9
AE1
OCMDATA8
AF1
OCMDATA7
OCMDATA7
AD2
OCMDATA6
OCMDATA6
AE2
OCMDATA5
AF2
OCMDATA5
OCMDATA4
OCMDATA4
AD3
OCMDATA3
OCMDATA3
AE3
OCMDATA2
OCMDATA2
AF3
OCMDATA1
OCMDATA1
AD4
OCMDATA0
OCMDATA0
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
4
5
5
5
5
1
1
1
6
7
0
0
2
3
2
2
2
2
2
3
3
3
0
4
4
3
5
2
3
0
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A
U
L
M
P
R
U
M
N
R
P
N
N
R
K
L
M
M
N
P
T
U
L
N
R
L
T
T
K
L
N
less R94 to CN6 pin 11
R101,R103 net swap
CN5
R161
1K/6
R162
1K/6
10
9
R163
1K/6
8
R164
1K/6
7
R165
1K/6
6
R166
1K/6
5
R167
1K/6
4
R168
220R/6
3
R169
220R/6
2
1
4501-10-10P-R
TO BUTTON BOARD
2.0mm pitch
90° E&T
GND
4607-11Pin
+1.8V_DVI
+2.5V_DDR
+3.3V_LVDSA
+3.3V_LVDS
+3.3V_DVI
+3.3V_PLL
+3.3V_LVDSB
FSVREF
+1.8V_ADC
+3.3V_ADC
3
3
3
2
2
3
0
2
1
7
2
3
3
3
3
3
3
3
2
2
3
3
1
1
1
2
2
2
1
5
1
3
3
2
4
0
0
2
2
2
2
2
2
A
B
C
2
2
2
6
8
9
1
1
9
8
6
3
2
2
C
D
D
D
C
C
E
2
1
3
4
2
3
3
4
2
1
3
1
3
1
J
M
P
L
T
V
R
Y
A
A
A
W
F
E
A
A
A
A
A
A
A
J
W
D
D
D
D
C
C
C
C
C
A
A
A
B
D
E
F
F
J
G
H
H
J
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 3
. 3
. 3
. 3
. 3
. 3
S
F
F
. 8
. 8
. 8
. 8
. 3
. 3
. 3
. 3
. 3
. 8
. 8
. 3
. 3
. 3
. 3
L
L
L
S
S
S
S
E
E
L
L
L
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
D
_ 1
_ 1
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
_ 3
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
D
D
D
D
P
_ P
P
V
R
R
I
I
I
I
I
I
I
I
I
_ F
D
D
D
D
S
S
S
S
S
S
S
S
S
S
S
S
S
S
B
B
B
A
A
A
_ L
_ R
V
V
C
C
C
C
C
C
3
_ S
_ S
V
V
V
V
V
V
V
V
V
_ D
_ D
F
F
F
F
F
F
F
F
F
F
F
F
F
F
S
S
S
S
S
S
S
S
3
3
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
3
3
3
3
D
D
D
D
D
D
3
F
F
A
A
A
A
A
A
3
A
3
3
3
3
3
V
V
V
V
V
V
A
3
3
D
A
D
L
L
L
L
L
L
A
A
A
A
D
D
D
D
D
D
D
D
D
V
D
D
D
D
V
D
D
V
V
V
V
V
V
GPIO_G06_B0
GPIO_G06_B1
GPIO_G06_B2
GPIO_G06_B3
GPIO_G05_B0
GPIO_G05_B3
GPIO_G04_B0
GPIO_G04_B1
GPIO_G04_B2
GPIO_G04_B3
GPIO_G04_B4
GPIO_G04_B5
GPIO_G04_B6
GPIO_G04_B7
GPIO_G07_B0
GPIO_G07_B1
GPIO_G07_B2
GPIO_G07_B3
GPIO_G07_B4
GPIO_G07_B5
GPIO_G07_B6
GPIO_G07_B7
LVDS_SHIELD[0]
LVDS_SHIELD[1]
LVDS_SHIELD[2]
LVDS_SHIELD[3]
LVDS_SHIELD[4]
LVDS_SHIELD[5]
GPIO_14/DHS
GPIO_15/DVS
GPIO_16/DEN
GPIO_G08_B5/JTAG_RESET
GPIO_G08_B4/JTAG_TDO
GPIO_G08_B3
GPIO_G08_B2/JTAG_TDI
GPIO_G08_B1/JTAG_MODE
GPIO_G08_B0/JTAG_CLK
GPIO_G09_B5
GPIO_G09_B4
GPIO_G09_B3
GPIO_G09_B2
GPIO_G09_B1
GPIO_G09_B0
NO_CONNECT
S
S
S
D
D
D
S
L
L
L
D
L
L
L
D
D
D
V
V
V
S
S
D
L
_ L
_ L
_ L
V
D
D
D
D
D
D
D
P
L
P
N
N
N
S
S
N
_ D
_ L
N
N
_ R
_ P
_ F
V
V
N
N
N
N
N
_ G
_ G
_ G
A
A
A
D
D
D
D
D
D
D
_ G
G
G
8
3
3
3
3
F
F
G
G
G
G
G
3
3
3
N
N
N
N
N
N
N
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
3
E
E
_ D
_ A
_ A
_ D
_ A
_ A
_ A
3
1
B
B
B
3
3
3
C
3
3
_ G
_ G
_ G
_ G
_ G
_ G
_ G
N
N
A
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
S
S
S
A
A
A
D
R
R
D
A
D
A
_ G
_ G
S
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
S
S
S
S
V
V
C
C
C
C
C
C
C
I
I
I
I
I
I
I
S
S
S
D
D
D
A
V
V
V
V
V
V
V
S
V
V
V
S
S
S
S
S
S
D
D
D
D
D
D
D
B
S
S
S
D
D
V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
L
L
L
V
V
V
V
F
F
A
A
A
A
A
A
A
D
D
D
D
D
D
D
L
V
V
V
3
4
5
9
0
9
7
4
4
4
5
5
5
6
6
6
2
3
3
3
4
4
1
0
7
7
7
0
1
1
1
1
2
1
1
6
1
3
3
5
7
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C
C
C
D
4
4
7
7
1
1
2
4
2
1
2
1
1
C
C
D
2
4
2
5
1
4
7
7
1
5
3
P
B
K
T
K
N
T
M
N
R
R
K
P
U
M
R
P
M
M
P
R
P
L
A
A
A
A
A
A
A
K
W
B
D
E
A
E
C
E
A
B
C
D
A
D
B
D
F
G
H
H
GND
GND
- 36 -
U5
GM1601
416PBGA
FSDATA[0..31]
E24
FSDATA0
E25
RN11
1
8
FSDATAU0
FSDATAU0
FSDATA0
FSDATA1
33
E26
FSDATAU1
FSDATAU1
2
7
FSDATA1
FSDATA2
G26
FSDATAU2
FSDATAU2
3
6
FSDATA2
FSDATA3
G24
FSDATAU3
FSDATAU3
4
5
FSDATA3
RN12
1
8
FSDATA4
H26
FSDATAU4
FSDATAU4
FSDATA4
33
2
7
FSDATA5
H24
FSDATAU5
FSDATAU5
FSDATA5
3
6
FSDATA6
J25
FSDATAU6
FSDATAU6
FSDATA6
RN7
4
1
5
8
FSDATA7
T26
FSDATAU7
FSDATAU7
FSDATA7
33
2
7
FSDATA8
R25
FSDATAU8
FSDATAU10
FSDATA10
3
6
FSDATA9
P24
FSDATAU9
FSDATAU11
FSDATA11
4
FSDATA10
P26
5
FSDATAU10
FSDATAU9
FSDATA9
FSDATA11
N24
FSDATAU11
FSDATAU8
FSDATA8
RN6
1
FSDATA12
8
N26
FSDATAU12
FSDATAU14
FSDATA14
33
2
7
FSDATA13
M25
FSDATAU13
FSDATAU15
FSDATA15
3
6
FSDATA14
L24
FSDATAU14
FSDATAU12
FSDATA12
RN13
4
1
5
8
FSDATA15
L25
FSDATAU15
FSDATAU13
FSDATA13
33
2
7
FSDATA16
M26
FSDATAU16
FSDATAU16
FSDATA16
FSDATA17
M24
FSDATAU17
FSDATAU17
3
6
FSDATA17
FSDATA18
N25
FSDATAU18
FSDATAU18
4
5
FSDATA18
FSDATA19
N23
FSDATAU19
FSDATAU19
RN9
1
8
FSDATA19
FSDATA20
P25
FSDATAU20
FSDATAU20
33
2
7
FSDATA20
FSDATA21
R26
FSDATAU21
FSDATAU21
3
6
FSDATA21
FSDATA22
FSDATAU22
FSDATAU22
4
5
FSDATA22
R24
FSDATA23
K24
FSDATAU23
FSDATAU23
FSDATA23
RN5
1
8
FSDATA24
J26
FSDATAU24
FSDATAU28
FSDATA28
33
2
7
FSDATA25
H25
FSDATAU25
FSDATAU26
FSDATA26
3
6
FSDATA26
G23
FSDATAU26
FSDATAU25
FSDATA25
RN4
4
1
5
8
FSDATA27
G25
FSDATAU27
FSDATAU24
FSDATA24
33
FSDATA28
F24
FSDATAU28
FSDATAU29
2
7
FSDATA29
FSDATA29
F25
FSDATAU29
FSDATAU30
3
6
FSDATA30
FSDATA30
F26
FSDATAU30
FSDATAU31
4
5
FSDATA31
FSDATA31
FSDATAU31
FSDATAU27
FSDATA27
RN3
1
8
FSADDRU6
FSADDR6
2
7
AD25
FSADDRU5
33
FSADDR5
3
6
FSADDR0
AD26
FSADDRU0
FSADDRU4
FSADDR4
4
5
FSADDR1
AC24
FSADDRU1
FSADDRU9
FSADDR9
FSADDR2
AC25
FSADDRU2
FSBKSELU1
RN2
1
8
FSBKSEL1
FSADDR3
AB26
FSADDRU3
FSBKSELU0
33
2
7
FSBKSEL0
FSADDR4
AA24
FSADDRU4
FSADDRU8
3
6
FSADDR8
FSADDR5
AA25
FSADDRU5
FSADDRU7
4
5
FSADDR7
FSADDR6
AA26
FSADDRU6
R36
33R/6
FSADDR7
Y24
FSADDRU7
FSADDRU0
FSADDR0
R35
33R/6
FSADDR8
FSADDRU8
FSADDRU1
FSADDR1
AB25
RN8
1
8
FSADDR9
FSADDRU9
FSADDRU11
FSADDR11
AC26
2
7
FSADDRU10
FSADDRU10
33
FSADDR10
FSADDR10
AB24
3
6
FSADDR11
FSADDRU11
FSADDRU3
FSADDR3
4
5
U24
FSADDRU2
FSADDR2
FSCLKp
U23
FSCLKU+
FSCLK+
FSCLK+ 5
FSCLKn
FSCLKU-
FSCLK-
FSCLK- 5
L26
FSDQS
FSDQSU
R34
33R/6
FSDQS 5
T25
FSDQM0
FSDQMU0
U25
FSDQM[0..3] 5
FSDQM1
FSDQMU1
U26
FSDQM2
FSDQMU2
/FSWEU
RN10
1
8
/FSWE
T24
/FSWE 5
/FSRAS 5
FSDQMU3
/FSRASU
33
2
7
/FSRAS
FSDQM3
V26
/FSCAS 5
/FSWEU
/FSCASU
3
6
/FSCAS
FSWE
V25
/FSCASU
FSCKEU
4
5
FSCKE
FSCAS
V24
FSCKE 5
RN1
1
8
FSRAS
W26
/FSRASU
FSDQMU0
FSDQM0
2
7
FSCKE
Y25
FSCKEU
FSDQMU3
33
FSDQM3
3
6
FSBKSEL0
Y26
FSBKSELU0
FSDQMU1
FSDQM1
4
5
FSBKSEL1
FSBKSELU1
FSDQMU2
FSDQM2
Place Series term ination resistors on bidirectional lines-DATA and DQS
(RN600,RN602,RN604,RN606,R605) m idw ay betw een U600 anf U700
AC18
AD18
Max trace length on this interfce is 2.5 inches
AE18
Minim ize trace length difference betw een DQS and data and
AF18
am ong the data lines
AE19
A3+
TXA3+
AF19
A3-
TXA3-
AE20
R603, R604 very close to U600
AC+
TXAC+
AF20
AC-
TXAC-
FSCLK+, FSCLK- should be routed like a differentail pair
AD21
AD22
AE21
TXA2+
+3.3V_DIG
A2+
AF21
TXA2-
A2-
AE22
TXA1+
A1+
AF22
TXA1-
A1-
AE23
A0+
TXA0+
AF23
R173
A0-
TXA0-
+3.3V_DIG
AD23
10K/6
MENU
AD24
SEL
AE24
PWR
AF24
DOWN
AF25
UP
AF26
LED_G
AE25
+3.3V_DIG
LED_R
AE26
ADO_C 8
R128
R33
ADO_C
AE8
10K/6
10K/6
nYCOEN
AF8
R172
nVDSW_SEL
AC9
nRESET
AD9
DVI DETECT
10K/6
AE9
CARD DETECT
AF9
CARD_RESET
AD10
TVBOX_DETECT
AE10
TUNER12V_KEY 7
TUNER12V_KEY
AF10
AC11
AD11
AE11
AF11
TXB3+
B3+
AF12
TXB3-
B3-
AE12
TXBC+
BC+
AF13
TXBC-
BC-
AE13
AD14
AF14
TXB2+
B2+
AE14
TXB2-
B2-
AF15
TXB1+
B1+
AE15
TXB1-
B1-
AF16
TXB0+
B0+
AE16
TXB0-
B0-
AC7
T115
R48
0/6
+3.3V_DIG
DCLK
AF17
T116
AD16
R59
10K/6
AD7
MUTE
MUTE 8
+3.3V_DIG
R52
2K7/6
AD8
JTAG_TRST
AF7
AE7
AF6
AE6
AD6
AF5
+3.3V_DIG
TT_I2CSDA
AE5
TT_I2CSCL
R63
10K/6
AD5
AC5
AF4
VGA_CAB
AE4
VGA_CAB 3
T117
R174
0/6
A26
PPWR
PPWR
PPWR 7
B26
PBIAS
PBIAS
PBIAS 7
AC17
R82
AC16
OEXTR
R42
3K3/6
OEXTR
AD15
R81
2K7/6
D_GND
GND
MSTR_SCL
GND
MSTR_SDA
+3.3V_DIG
S
S
S
S
D
D
D
D
D
D
D
D
_ S
_ S
_ D
_ D
3
3
3
3
3
3
3
3
+5V
3
A
D
A
D
S
S
S
S
S
S
S
S
C
V
V
V
V
C
1
/RESET
/RESET
V
OUT
C78
C80
C76
4
2
4
J
J
K
0.1uF/6
0.1uF/6
0.1uF/6
D
N
G
U8
MAX809_0
2
GND
GND
Chapter 7
CN8
1
2
RX2-
1
2
RX2+
3
4
RX1-
3
4
RX1+
5
6
RX0-
5
6
RX0+
7
8
RXC-
7
8
RXC+
9
10
9
10
11
12
Y0
Y1
11
12
13
14
Y2
Y3
13
14
15
16
Y4
Y5
15
16
17
18
Y6
Y7
17
18
19
20
LLC_VPC
19
20
FSDATA[0..31] 5
21
22
21
22
23
24
SCART_FUNC
23
24
26
25
SCART_RGB_CON
25
26
27
28
nYCOEN
27
28
29
30
nVDSW_SEL
29
30
TT_I2CSCL
31
32
nRESET
31
32
TT_I2CSDA
33
34
DVI DETECT
33 34
35
36
CARD DETECT
35 36
38
TVBOX_DETECT
37
37 38
39
40
IR1
39 40
41
42
41 42
43
44
V5IR
43 44
V12
1841 44P
GND
GND
AGND
FSBKSEL1 5
FSBKSEL0 5
FSADDR[0..11] 5
Place Series term ination resistors on all address and
control lines (RN601,RN603,RN605) very close to U600
Unloaded trace im pedance on this interface is 90 Ohm
Loaded trace im pedace w ith DRAM load is 65 Ohm (for 2.5 inch total trace
length)
CN2
1
TXA0-
2
1
2
3
TXA1-
4
3
4
TXA2-
5
6
5
6
7
8
7
8
9
10
TXAC-
9
10
+3.3V_LVDS
11
12
TXA3-
11
12
13
14
TXB0-
13
14
15
16
15
16
17
18
TXB1-
17
18
19
20
R15
TXB2-
19
20
21
22
10K/6/NC
TXBC-
21
22
TXB3-
23
24
23
24
25
26
25
26
R129
0/6/NC
27
28
27
28
R130
0/6/NC
+5V
+3.3V_DIG
29
30
29
30
LCDVCC
R16
1841 30P
PANEL_VCC
GND
GND
0/6/NC
R175
0/6/NC
GND
PANEL_VCC
2K7/6
R84
0/6
U7
8
1
V
5
VCC
A0
/ 2
/ 6
7
2
WP
A1
F
F
6
3
u
u
SCK
A2
. 1
2 2 2
1
5
4
R85
1
SI
VSS
1
0
C
C
24LC32-SN
0/6/NC
GND
SOIC8
GND
GND
I2C address: A2H and A3H
GND
PROJECT : M0TW
Quanta Computer Inc.
Title
04. gm1601
Size
Document Number
M0TW
04. gm1601
Date:
Tuesday , September 14, 2004
Sheet
KEY1
KEY2
KEY3
MSTR_SCL
MSTR_SDA
CARD_RESET
ADO_L 8
ADO_R 8
TXA0+
TXA1+
TXA2+
+3.3V_LVDS
TXAC+
TXA3+
TXB0+
TXB1+
C
/ N
TXB2+
/ 6
TXBC+
4
K
1
TXB3+
0
R
1
LCDVCC
LCDVCC
3
1
R
C
/ N
/ 6
0
GND
Rev
A
4
of
8