Apogee DDX-2060 Руководство - Страница 11

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DDX-2050 POWER DEVICE
The DDX-2050 Power Device is a dual channel
H-Bridge that can deliver over 30 watts per
channel of audio output power at very high
efficiency.
It converts DDX controlled PWM
signals to power at the load. The DDX-2050
includes a logic interface, integrated bridge
drivers, high efficiency MOSFET outputs and
over-voltage,
thermal
protection circuitry. Two logic level signals per
channel
are
used
MOSFET switches to connect the speaker load
to the input supply or to ground in a bridge
configuration, according to Apogee's patented
damped ternary PWM. The DDX-2050 includes
over-current,
thermal,
protection and under-voltage lockout with
automatic recovery. A thermal warning status
is also provided.
INL[1:2]
INR[1:2]
Logic I/F
VL
and Decode
PWRDN
TRI-STATE
Protection
FAULT
Circuitry
TWARN
Regulators
Figure 9: DDX-2050 Block Diagram
Logic Interface and Decode
The DDX-2050 power outputs are controlled
using two logic level timing signals. In order to
provide a proper logic interface, the VL input
must operate at the same voltage as the DDX
controller logic supply.
Protection Circuitry
The DDX-2050 includes protection circuitry for
over-current,
over-voltage,
overload conditions.
TWARN is activated low (open-drain MOSFET)
when the IC temperature exceeds 130°C, in
advance of the thermal shutdown protection.
When a fault condition is detected (logical OR
of over-current,
129 Morgan Drive, Norwood, MA 02062
CONTROLLED DOCUMENT:
and
short
circuit
to
control
high-speed
and
over-voltage

OUTPL

Left
H-Bridge

OUTNL

OUTPR

Right
H-Bridge

OUTNR

and
thermal
A thermal warning pin
Specifications are subject to change without notice.
voice: (781) 551-9450
DRN: PRELIMINARY
over-voltage, and thermal), an internal fault
signal acts to immediately disable the output
power MOSFETs, placing both H-bridges in a
high impedance state.
open-drain MOSFET connected to the FAULT
pin is switched on.
modes subsequent to activating a fault. The
first is a SHUTDOWN mode. With FAULT (pull-
up resistor) and TRI-STATE pins independent,
an activated fault will disable the device,
signaling low at the FAULT output. The device
may subsequently be reset to normal operation
by toggling the TRI-STATE pin from High to
Low to High using an external logic signal. The
second is an AUTOMATIC recovery mode.
This is depicted in the application circuit in
Figure 4. The FAULT and TRI-STATE pins are
shorted together and connected to a time
constant circuit comprising R6 and C17.
activated FAULT will force a reset on the TRI-
STATE pin causing normal operation to resume
following a delay determined by the time
constant of the circuit. If the fault condition is
still presented, the circuit operation will continue
repeating until such time as the fault condition
is removed. An increase in the time constant of
the circuit will produce a longer recovery
interval.
Care must be taken in the overall
system design so as not to exceed the
protection thresholds under normal operation.
Power Outputs
The DDX-2050 power and output pins are
duplicated to provide a low impedance path for
the devices bridged outputs.
power, ground and output pins must be
connected for proper operation. The PWRDN or
TRI-STATE pins should be used to set all
MOSFETS to the Hi-Z state during power-up
until the logic power supply, VL, is settled.
Parallel Output/High Current Operation
The DDX-2050 outputs can be connected in
parallel to increase the output current to a load.
In this configuration the device can provide over
60W into 4Ω (see Figure 3).   T his mode is
enabled with the CONFIG pin connected to
VREG1 and the inputs combined INLA = INLB,
fax: (781) 440-9528
DDX-2050
At the same time an
There are two possible
All duplicate
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