Dynamic Engineering IP-CF Руководство пользователя - Страница 12
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Печатать страницуInterrupts
All IP Module interrupts are vectored. The vector from IP-CF comes from a vector
register loaded as part of the initialization process. The vector register can be
programmed to any 8 bit value. The default value is $FF which is sometimes not a valid
user vector. The software is responsible for choosing a valid user vector.
The CompactFLASH state machines generate an interrupt request when a programmed
condition is detected. The interrupt is mapped to interrupt request 0. The CPU may
respond by asserting INT. The hardware will automatically supply the appropriate
interrupt vector when accessed by the CPU. The source of the interrupt is obtained by
reading the CompactFLASH internal registers.
Some carrier boards pre-fetch data. If your carrier board pre-fetches the interrupt
status, then the status may be cleared when the SW goes to look at it. If this is an issue
then be careful with the order of reading the registers to prevent the pre-fetching
function from affecting operation.
The interrupt level seen by the CPU is determined by the IP Carrier board being used.
The master interrupt can be disabled or enabled through the ip_cf_cntl register. The
Interrupt acknowledge cycle fetches the vector, but does not clear the interrupt request
in this design. The interrupt acknowledge cycle is not needed for this design and is
supported to be in compliance with the IP Module standard. If your design does not
need to use the interrupt vector then the Interrupt space and vector can be bi-passed in
favor of direct access to the CompactFLASH module for interrupt status information.
If operating in a polled mode and making use of the interrupts for status then the master
interrupt should be disabled.
E m b e d d e d
S o l u t i o n s
P g
1 2
o f
2 0