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ISAIX16 User's Manual
USING PARALLEL PORT as EXTERNAL TTL
CONTROL
The following information on the PC/AT parallel ports is provided
for users, who wish to use the parallel port pins as the TTL
control lines to the Bus Isolation Extenders.
1st Parallel Port:
Data Register = 378; Status Register = 379;
Control Register = 37A;
2nd Parallel Port: Data Register = 278; Status Register = 279;
Control Register = 27A;
Data Register:
Bit 0 - 7 = Data Bit 0 - 7
Status Register:
Bit 7 = /BUSY
Bit 6 = /ACK
Bit 5 = PE
Bit 4 = SLCT
Bit 3 = /ERROR
Bit 2 = N/A
Bit 1 = N/A
Bit 0 = N/A
The female 25 pin parallel port pin outs are:
1
/STROBE
(output)
14
2
Data 0
(I/O)
15
3
Data 1
(I/O)
16
4
Data 2
(I/O)
17
5
Data 3
(I/O)
18
6
Data 4
(I/O)
19
7
Data 5
(I/O)
20
8
Data 6
(I/O)
21
9
Data 7
(I/O)
22
10
/ACK
(Input)
23
11
BUSY
(Input)
24
12
PE
(Input)
25
13
SLCT
(Input)
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Adex Electronics
IRQ = 7
IRQ = 5
Control Register:
Bit 7 = N/A
Bit 6 = N/A
Bit 5 = N/A
Bit 4 = IRQ_ENABLE
Bit 3 = SLCT_IN
Bit 2 = /INIT
Bit 1 = AUTO_FEED
Bit 0 = STROBE
/AUTO_FEED
(output)
/ERROR
(Input)
/INIT
(output)
/SLCT_IN
(output)
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
ISAIX16 User's Manual
Note:
1. /STROBE, BUSY, /AUTO_FEED, /SLCT_IN are inverted by
Hardware (1 in software will appear as low at pin).
2. During power up, parallel port pins /STROBE, /AUTO_FEED,
/SLCT_IN are reset to logic high; and /INIT is reset to logic
low. After BIOS initialization, /INIT is toggled to high and
/SLCT_IN is toggled to low.
3. Depending on the sequence of the BIOS initialization in each
CPU system, one can use any of the signal pins, low or high
to bring the extender up during cold boot. In some systems,
an extra soft reboot by Ctrl Alt Del, after the first power up,
may be necessary to get the plug and play boards to be
recognized by BIOS.
4. The LED- pin on the W7 header on the Bus Isolation
Extender could be connected to the SLCT pin on the parallel
port (pin 13) as status input. The LED- at low will indicate
successful bus connection and at high indicates no signal
connection. The #Power_Control at pin 1 of the W7 header
can also be used as a positive indication of cable connection
and power connection. It could be connected to BUSY pin of
the printer port for that purpose.
5. Some CPU system may relocate the parallel port I/O
addresses or may use 3BC-3BF as the 1st parallel port /O
addresses. One may verify the I/O addresses by looking at
memory location 0:408, ROM BIOS data areas using the
DOS debug command.
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Adex Electronics