Fujitsu PRIMEPOWER 850 Техническая белая книга - Страница 10
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System Board
To increase the mounting density, eight CPUs are mounted on one system board. In addition, to fully utilize the space,
the DIMMs are mounted three dimensionally using a riser card. 32 GB of memory can be mounted per system board.
The DDCON section of the power supply has also been decentralized and mounted on the system board and CPU
modules. The result is that mounting density of the power supply has been greatly increased.
SPARC64™ GP Processors
The SPARC64™ GP CPU employs super scalar processing technology and is a highly reliable, highly integrated
processor based on the SPARC-V9 64 bit architecture.
PRIMEPOWER 650 and 850 models provide a processor module with a SPARC64™ GP CPU and secondary cache
SRAM mounted in high density.
- Full conformity with SPARC Version 9
- Up to four instructions can be issued per cycle
- Simultaneous execution of up to eight instructions: 4 integer operations (or 2 address operations), 2
floating point operations, and 2 load/store operations
- Execution of a full range out-of-order instruction for all instructions using the register rename function and
reservation station. Except for special instructions like member, etc.
- High-level dynamic branch forecast function (16K entry forecast table)
- 64-bit virtual address space
- Support for m ultiple page sizes of up to 4 GB. By use of a n MMU option with a symmetrical, full-
associative 256-entry TLB for all page sizes
- Large-capacity primary cache of 128 KB (I) + 128 KB (D).
- Large-capacity 8-MB secondary cache
- Pipeline L2 cache interface enabling high performance
- ECC protection for both caches types (primary and secondary)
- 128-bit data bus and 16-bit ECC
- High-speed bus (peak bandwidth of 2.2 GB/s)
- Support for future upgrades
01/12/31
8 CPU Mounted system board
PRIMEPOWER 650 and 850 Technical White Paper
CPU-Module
DIMM-Riser-L
DIMM-Riser-R
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